THEORY OF OPERATION
2-4. Power-On Reset Circuit
Immediately following
+
C2
| +5V |
IC4 | +5V |
| |
| VCC |
CD | RESET |
| GND |
RESET IC
IC5 : CPU
CPU
RESRESO
DD3
Circuit
+5V
+5V
VCC
IC10
RESET
Gate array
IC1
Fig.
1At power on,
T = 0.34 × C2 (pF) [μs] = 160ms
2The LOW signal resets the CPU and the mechanism drive circuits, and sets
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