Sun Microsystems X4240, X4440, X4140 manual Error Handling, Handling of Uncorrectable Errors

A P P E N D I X D

Error Handling

This appendix contains information about how the servers process and log errors. See the following sections:

■“Handling of Uncorrectable Errors” on page 53

■“Handling of Correctable Errors” on page 56

■“Handling of Parity Errors (PERR)” on page 59

■“Handling of System Errors (SERR)” on page 61

■“Handling Mismatching Processors” on page 63

■“Hardware Error Handling Summary” on page 64

Handling of Uncorrectable Errors

This section lists facts and considerations about how the server handles uncorrectable errors.

Note – The BIOS ChipKill feature must be disabled if you are testing for failures of multiple bits within a DRAM (ChipKill corrects for the failure of a four-bit wide DRAM).

■The BIOS logs the error to the SP system event log (SEL) through the board management controller (BMC).

■The SP's SEL is updated with the failing DIMM pair's particular bank address.

■The system reboots.

■The BIOS logs the error in DMI.

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