B-2
SuperWorkstation 7045A-C3/7045A-CT User's Manual
POST Code Description
18h 8254 timer initialization
1Ah 8237 DMA controller initiali zation
1Ch Reset Programmable Interrupt Cont roller
20h 1-3-1-1 Test DRAM refresh
22h 1-3-1-3 Test 8742 Keyboard Controller
24h Set ES segment register to 4 G B
28h Auto size DRAM
29h Initialize POST Memory Manager
2Ah Clear 512 kB base RAM
2Ch 1-3 -4-1 RAM failure on addre ss line xxxx*
2Eh 1-3-4 -3 RAM failure on data bits xxxx* of low by te of
memory bus
2Fh En able cache before system BIOS shadow
32h Test CPU bus-clock frequency
33h Initialize Phoenix Dispatc h Manager
36h Warm start shut down
38h Shadow system BIOS ROM
3Ah Auto size cache
3Ch Advanced confi guration of chipset registers
3Dh Load alter nate registers with CMOS values
41h Initialize extended memory for RomPilot (optional)
42h Initialize interrupt vectors
45h POST device initialization
46h 2-1-2-3 Check ROM copyright n otice
48h Check video confi guration against CMOS
49h Initialize PCI bus and devic es
4Ah Initial ize all video adapters in system
4Bh QuietB oot start (optional)
4Ch Shadow video BIOS ROM
4Eh Display BI OS copyright notice
4Fh Initialize MultiBoot
50h Display CPU type and sp eed
51h I nitia lize E ISA bo ard (o ption al)
52h Test keyboard
54h Set key click if enabled
55h Enable USB devices
58h 2-2-3-1 Test for unexpected interr upts
59h Initialize POST display ser vice
5Ah Display pr ompt “Press <ESC> to enter SETU P”
5Bh Disabl e CPU cache