Appendix B: BIOS POST Codes
B-5The following are fo r boot block in Flash ROM
POST Code Description
E0h Initialize the chipset
E1h Initialize the bridge
E2h Initialize the CPU
E3h Initialize system timer
E4h Initialize system I/ O
E5h Check force recover y boot
E6h Checksum BIOS ROM
E7h Go to BIOS
E8h Set Huge Segment
E9h Initialize Multi Proc essor
EAh Initialize OEM special code
EBh Initialize PIC and DMA
ECh Initialize Memory t ype
EDh Initialize Memory size
EEh Shadow Boot Bloc k
EFh System memory test
F0h Initialize interrupt vectors
F1h Initialize Run Tim e Clock
F2h Initialize video
F3h Initialize System Management Manager
F4h Outp ut one beep
F5h Clear Huge Segment
F6h Boot to Mini DOS
F7h Boot to Full DOS
If the BIOS detects errors on 2C, 2E, or 30 (base 512K RAM errors), it displays
an additional word-bitmap (xxxx) to indicate the address line or bi ts that have
failed. For example, “2C 0 002” means address line 1 (bit one set) has fail ed. “2E
1020" means data bits 12 and 5 (bi ts 12 and 5 set) have failed in the lower 16 bits.
The BIOS also sends the bit map to the port- 80 LED display. It fi rst displays the
checkpoint code, fo llowed by a delay, the high-order byte, another del ay, and then
the loworder byte of the err or. It repeats this sequence conti nuously.