SuperWorkstation
UDIMM Memory Support
Ranks Per | Memory Capacity | Speed (MT/s) and Voltage Validated by | |||||||
DIMM & Data | Per DIMM (Note 1) | Slot Per Channel (SPC) and DIMM Per | |||||||
Width |
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| Channel (DPC) (Notes 2, 3, 4) | |||||
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| 2 Slots Per Channel |
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| 1DPC |
| 2DPC | |||
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| 1.35V |
| 1.5V | 1.35V | 1.5V | |
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SRx8 | 1GB | 2GB | 4GB | n/a |
| 1066, | n/a | 1066, | |
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| 1333 |
| 1333 | |
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DRx8 | 2GB | 4GB | 8GB | n/a |
| 1066, | n/a | 1066, | |
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| 1333 |
| 1333 | |
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SRx16 | 512MB | 1GB | 2GB | n/a |
| 1066, | n/a | 1066, | |
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| 1333 |
| 1333 | |
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SRx8 ECC | 1GB | 2GB | 4GB | 1066, |
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| 1066, | 1066 | 1066, |
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| 1333 |
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| 1333 |
| 1333 |
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DRx8 ECC | 2GB | 4GB | 8GB | 1066, |
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| 1066, | 1066 | 1066, |
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| 1333 |
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| 1333 |
| 1333 |
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Notes:
1.1Gb/2Gb/4Gb DRAMs are supported; however, only 2Gb and 4Gb DRAMs are validated.
2.Command Address Timing is 1N for 1DPC and 2N for 2DPC.
3.
4.Please refer to the
RDIMM Memory Support
Ranks Per | Memory Capacity | Speed (MT/s) and Voltage Validated by | ||||||
DIMM & Data | Per DIMM (Note 1) | Slot Per Channel (SPC) and DIMM Per | ||||||
Width |
|
|
| Channel (DPC) (Notes 2, 3, 4) | ||||
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| 2 Slots Per Channel |
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| 1DPC | 2DPC | |||
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| 1.35V |
| 1.5V | 1.35V | 1.5V |
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SRx8 | 1GB | 2GB | 4GB | 1066, | 1066, | 1066 | 1066, | |
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| 1333 | 1333 |
| 1333 | |
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DRx8 | 2GB | 4GB | 8GB | 1066, | 1066, | 1066 | 1066, | |
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| 1333 | 1333 |
| 1333 | |
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SRx4 | 2GB | 4GB | 8GB | 1066, | 1066, | 1066 | 1066, | |
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| 1333 | 1333 |
| 1333 | |
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DRx4 | 4GB | 8GB | 16GB | 1066, | 1066, | 1066 | 1066, | |
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| 1333 | 1333 |
| 1333 | |
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QRx4 | 8GB | 16GB | 32GB | 800 | 1066 | 800 | 800 | |
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QRx8 | 4GB | 8GB | 16GB | 800 | 1066 | 800 | 800 | |
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Notes:
1.1Gb/2Gb/4Gb DRAMs are supported; however, only 2Gb and 4Gb DRAMs are validated.
2.Command Address Timing is 1N.
3.Please refer to the
4.QR RDIMMs are supported but not validated. Memory testing are limited to system level testing. Signal integrity testing in interoperability testing are not performed. The passing QR RDIMMs will be posted on the website.