T-SGPIO 1/2 Headers
Two
Pin Definitions
Purpose Input/Output) headers are located near the SATA connectors on the motherboard. These headers are used to communicate with the enclosure management chip in the
Pin#
1
3
5
7
Definition
NC
Ground
Load
Clock
Pin Definition
2NC
4 DATA Out
6Ground
8NC
system. See the table on the right for pin definitions. Refer to the board layout below for the locations of the headers.
NC: No Connections
Trusted Platform Module Header
Pin Definitions
TPM Header
This header is used to connect a Trusted Platform Module (TPM), which is available from a
KB/MOUSE | JF1 |
Pin # Definition
1LCLK
3LFRAME
5 | LRESET |
7 | LAD3 |
9VCC3
11LAD0
13RSV0
15SB3V
17GND
19LPCPD
Pin # Definition
2GND
4No Pin
6VCC5
8LAD2
10LAD1
12GND
14RSV1
16SERIRQ
18CLKRUN
20RSV2
USB/0/1 | LAN |
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| IPMI |
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COM1 |
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| C |
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| DDR3 1066/1333 UDIMM required |
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VGA |
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| CPU |
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LAN1 |
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LAN2 |
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| SLOT7 |
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| SLOT6 |
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| SLOT5 |
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| JBT1 |
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| SLOT4 |
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| COM2 | USB 12/13 | USB4/5 | USB2/3 | USB11 |
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DIMM1A DIMM2A DIMM1B DIMM2B
A.
B.
C. TPM Header
B
A