Texas Instruments TLV1562 manual DSP Algorithm for Mono Interrupt Driven Mode Using RD

Conversation Between the TLV1562 and the DSP

Table 7. DSP Algorithm for Mono Interrupt Driven Mode Using RD

Wait cycles for the DSP internally (40 MHz DSPCLK):

STEPS

TIMING, NOTES

APD=0

APD=0

APD=1

APD=1

ADCSYCLK

ADCSYCLK

ADCSYCLK

ADCSYCLK

= 7.5 MHz

= 10 MHz

= 10 MHz

= 10 MHz

0.

Initialization

Write all configuration data to the

activate the mono interrupt-driven mode

ADC

in CR0(2;3)

1.

set

deselect ADC (optional with APD=0)

CS

2.

clear

Select ADC

CS

(Note: if Hardware Auto power down is

enabled, Chip select has to be used,

otherwise CS can be left high)

3.

Wait for

tD(CSL-sample)= 5ns (APD=0)

≥ 6

≥ 5

≥ 26

≥ 25

tD(CSL-sample)+1ADCSYSCLK

tD(CSL-sample)= 500ns (APD=1)

4.

Clear

ADC goes over from sampling into

RD

conversion

5.

Wait until

goes low

alternative: ignore the

signal, wait 49

≥ 34

≥ 22

≥ 34

≥ 22

INT

INT

ns+5(6) ADCSYSCLK and goto step

number 7

6.

Wait the time tEN(DATAOUT)

tEN(DATAOUT) = 41 ns

≥ 2

≥ 2

≥ 2

≥ 2

7.

Read sample out from the data port;

Reset

signal

RD

8.Goto step 1 or step 3 (if APD=0) for more samples

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP 13