Software Overview
* clear mode related bits in CR0 and set MONO_INT:
@CR0_SEND &= #(MONO_INT^0FFFFh) | ; clear bit for no calibration use |
@CR0_SEND &= #(DUAL_INT^0FFFFh) | ; clear bit for no calibration use |
@CR0_SEND &= #(MONO_CONTINUOUS^0FFFFh); clear bit for no calibration use | |
@CR0_SEND &= #(DUAL_CONTINUOUS^0FFFFh); clear bit for no calibration use |
@CR0_SEND | = #MONO_INT | ; set calibration for further use |
* clear clock | related bits in CR0 and set internal clock mode: | |
@CR0_SEND &= #(CLK_INTERNAL^0FFFFh) | ; clear bit for no calibration use | |
@CR0_SEND &= #(CLK_EXTERNAL^0FFFFh) | ; clear bit for no calibration use | |
@CR0_SEND = #CLK_INTERNAL | ; set calibration for further use | |
* set mode for intermal offset calibration: | ||
@CR_CALIBRA = #INT_OFF_CALIB | ; set internal calibration mode |
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*verify ADC register CR0/CR1
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*write CR1 (to reset old CSTART mode initialization, because otherwise, the ADC never sets
*back its INT– pin to show a sample is available:
@CR_PROBLEM = #(SW_PWDNNO_AUTO_PWDNNO_2COMPLEMENTNO_DEBUGRES_10_BITRD_CONV_START);
port(ADC) = @CR_PROBLEM | ; Address decoder sets CS low, |
| ; WR– low and send CR_PROBLEM value to the ADC |
NOP | ; wait for tW(CSH)=50ns |
*write CR1
*initialize the send values to setup the two programmable registers of the ADC
@CR_PROBLEM = #(NO_SW_PWDNNO_AUTO_PWDNNO_2COMPLEMENTNO_DEBUGRES_10_BITCST_CONV_START);
port(ADC) = @CR_PROBLEM | ; send CR0 value to the ADC | ||||
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port(DEACTIVE) = @ZERO | ; deselect ADC (CS high) | ||||
NOP | ; wait for tW(CSH)=50ns | ||||
* write CR0 |
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port(ADC) = @CR_CALIBRA | ; send CR0 value to the ADC | ||||
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port(DEACTIVE) = @ZERO | ; deselect ADC (CS high) | ||||
NOP | ; wait for tW(CSH)=50ns |
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*do one sample to perform the calibration
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XF | = | 0 | ; clear CSTART | ||
repeat(#10) |
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nop |
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| ; wait for some sampling time | ||
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XF | = | 1 | ; reset CSTART |
repeat(#34)