Conversation Between the TLV1562 and the DSP
7.4Dual Interrupt Driven Mode
Using techniques similar to those described in the first two modes for sampling/converting/sending tasks, the dual mode samples two channels at the same time and sends out the results in series to the data port. The CSTART pin is used to start sampling and converting.
Table 9. DSP Algorithm for Dual Interrupt Driven Mode
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Wait cycles for the DSP internally (40MHz DSPCLK): | |||
| STEPS | TIMING, NOTES | APD=0 | APD=0 | APD=1 | APD=1 | |||||||||||||
| ADCSYCLK | ADCSYCLK | ADCSYCLK | ADCSYCLK | |||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| = 7.5MHz | = 10MHz | = 10MHz | = 10MHz |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1. | Set |
|
|
|
|
|
|
|
|
|
|
| Deselect ADC |
|
|
|
| ||
CS |
|
|
|
| |||||||||||||||
2. | Clear |
|
|
|
|
|
|
|
|
| This starts sampling |
|
|
|
| ||||
CSTART |
|
|
|
| |||||||||||||||
3. | Wait for tW(CSTARTL) | tW(CSTARTL) = 100ns (APD=0) | ≥ 4 | ≥ 4 | ≥ 24 | ≥ 24 | |||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
| tW(CSTARTL) = 600ns (APD=1) |
|
|
|
| ||
4. | Set |
|
|
|
|
|
|
|
|
|
| This starts the conversion |
|
|
|
| |||
CSTART |
|
|
|
| |||||||||||||||
5. | Wait until |
|
| goes low | Alternative: ignore the |
| signal, | ≥ 62 | ≥ 48 | ≥ 62 | ≥ 48 | ||||||||
INT | INT | ||||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
| wait 210ns+10 ADCSYSCLK and go |
|
|
|
| ||
|
|
|
|
|
|
|
|
|
|
|
|
| to step number 7 |
|
|
|
| ||
|
|
|
|
|
|
|
|
|
|
| |||||||||
6. | Wait the time | ≥ 1 | ≥ 1 | ≥ 1 | ≥ 1 | ||||||||||||||
7. | Clear |
|
|
| Select the ADC |
|
|
|
| ||||||||||
CS |
|
|
|
| |||||||||||||||
8. | Clear |
|
|
|
|
|
| Start communication |
|
|
|
| |||||||
RD |
|
|
|
| |||||||||||||||
9. | Wait the time tEN(DATAOUT) | tEN(DATAOUT) = 41 ns | ≥ 2 | ≥ 2 | ≥ 2 | ≥ 2 |
10.Read sample out from the data port; reset RD signal
11. | Wait tW(CSH) | tW(CSH) = 50 ns | ≥ 2 | ≥ 2 | ≥ 2 | ≥ 2 |
12. | Clear RD- | Start communication |
|
|
|
|
|
|
|
|
|
|
|
13. | Wait the time tEN(DATAOUT) | tEN(DATAOUT) = 41 ns | ≥ 2 | ≥ 2 | ≥ 2 | ≥ 2 |
14.Read sample out from the data port; reset RD signal
|
|
|
15. Set CS | Deselect ADC |
16.Goto step 2 for the next samples
Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP | 15 |