8.3.7Interrupt Latency

Software Overview

8.3.7Interrupt Latency

The time required to execute an interrupt depends on the handling of the IRQ at the four-word vector address or jumping further with a GOTO instruction. Using the fast return from IRQ instruction, and branching from the IRQ vector to a separate routine memory location, produces an IRQ overhead of:

3 sysclk (goto IRQ vector) + 4sysclk (goto/dgoto) + 1 sysclk (fast return) = 8 instruction cycles

The time between when the IRQ occurs and the routine executes its first instruction depends on the instruction in the CPU pipeline when the interrupt occurs. Running a repeat command delays the IRQ until the full number of repetitions is finished.

NOTE: Using a delayed branch instruction (dgoto) and putting two useful words of instruction behind this instruction saves the CPU calculation power.(See the explanations about delayed branches Section 8.3.8).

8.3.8Branch Optimization (goto/dgoto, call/dcall, ...)

The easiest solution for a branch is to use the goto instruction. Since the ’C54x has a pipeline to allow execution of one instruction in one clock cycle, a simple branch instruction will take four cycles for execution. Example:

GOTO MARK

...

MARK: DP = #1;

ARP = #5;

...

The program counter (PC) points after the last instruction (ARP=#5) past 6 sysclk cycles. However, this can be optimized, using a delayed branch.

DGOTO MARK

DP = #1;

ARP = #5;

...

MARK: ...

The time to execute the same number of instructions is now only four CPU clock cycles. (After four instructions, the PC points to the address MARK. The reason for this is the processor’s pipeline finishes the instructions after dgoto and does not just trash the already-processed fetch when the branch is in the pipeline’s decoding state.

Conclusion: The goto and dgoto instructions both execute the branch in less than four SYSCLCKs, but the dgoto instruction can execute the next two instructions following dgoto in the same amount of time.

CAUTION:

Use the delayed branches carefully, since it looks confusing when an instruction has been executed after a call instruction. A solution is to first use the normal branches when writing the code, and when all tasks have been finished, optimize the code with the delayed algorithms.

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Texas Instruments TLV1562 Interrupt Latency, Branch Optimization goto/dgoto, call/dcall, Goto Mark, MARK DP = #1 ARP = #5