Figure 8. Time Optimization (monocst1)

Software Overview

CSTART

RD

825 ns = 1.2 MPS Throughput

CS

INT

Figure 8. Time Optimization (monocst1)

Maximum Performance at 1.2 MSPS with Internal Clock

8.5.3Dual Interrupt Driven Mode

The following descriptions explain the software for the data acquisition in Dual Interrupt Driven Mode (using the CSTART signal). The required interface connections are shown in Figure 2.

Program Files:

DUALIRQ1.ASM

Includes the complete software algorithm to control the Dual IRQ Driven Mode

CALIBRAT.ASM

Calibration procedure of the DAC

CONSTANT.ASM

Common file of all modes (constants definition)

VECTORS.ASM

Common file of all modes (IRQ vector table)

Other Files:

 

linker.cmd

Organization of the DSP memory (data and program memory)

auto.bat

Batch file to start the compiler for the dual interrupt driven software

asm500.exe

54x Code compiler

lnk500.exe

C54x linker

The timing requirements to interface the ’C54x to the ADC are provided in Table 9. The STEP numbers given there can be found again as Marker in the code. This helps to debug and verify the code.

Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSP

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Texas Instruments TLV1562 manual Dual Interrupt Driven Mode, Time Optimization monocst1, Program Files, Other Files