VXI 320222-01 - page 145

Chapter 5 Programming Considerations

The RM performs the following steps:

1. Scans logical addresses (0 to FF) and identifies all devices in VXIbus Mainframe #1. Finds

the VXI-MXIs at logical addresses 2 and 4 and moves DC devices to the lowest unused

logical addresses (for example, 1, 3, 5, 6).

2. Enables the logical address window of the VXI-MXI found at logical address 2 for the entire

outward mapping range of 0 to FF. Scans all logical addresses, skipping all previously

encountered devices, and finds the VXI-MXI in VXIbus Mainframe #3, the VXI-MXI in

VXIbus Mainframe #2, MXIbus Device A, and MXIbus Device B.

3. Enables the logical address window of the VXI-MXI in VXIbus Mainframe #3 for the entire

inward mapping range of 0 to FF. Scans all logical addresses, skipping all previously

encountered devices, and finds the VXI-MXI at logical address 82. Finds the Slot 0 device

and uses it to move all DC devices in VXIbus Mainframe #3 to the lowest unused logical

addresses (for example, 81, 83, 84, 85).

4. Enables the logical address window of the VXI-MXI found at logical address 82 for the

entire outward mapping range of 0 to FF. Scans all logical addresses, skipping all

previously encountered devices, and finds the VXI-MXI in VXIbus Mainframe #4 and the

VXI-MXI in VXIbus Mainframe #5.

5. Enables the logical address window of the VXI-MXI in VXIbus Mainframe #4 for the entire

inward mapping range of 0 to FF. Scans all logical addresses, skipping all previously

encountered devices. Finds the Slot 0 device and uses it to move all DC devices in VXIbus

Mainframe #4 to the lowest unused logical addresses. No more VXI-MXI interfaces are

found. The RM enables the logical address window for the VXI-MXI in VXIbus Mainframe

#4 with an inward range of A0 to AF hex by writing the value 64A0 hex to the Logical

Address Window Register (Base/Size format).

6. Enables the logical address window of the VXI-MXI in VXIbus Mainframe #5 for the entire

inward mapping range of 0 to FF. Scans all logical addresses, skipping all previously

encountered devices and previously defined address ranges. Finds the Slot 0 device and

uses it to move all DC devices in VXIbus Mainframe #5 to the lowest unused logical

addresses. No more VXI-MXI interfaces are found. The RM enables the logical address

window for the VXI-MXI in VXIbus Mainframe #5 with an inward range of B0 to BF hex

by writing the value 64B0 hex to the Logical Address Window Register (Base/Size format).

7. Sets the logical address window of the VXI-MXI found at logical address 82 to cover the

ranges of the VXI-MXI in VXIbus Mainframe #4 (A0 to AF) and the VXI-MXI in VXIbus

Mainframe #5 (B0 to BF). Enables the logical address window of the VXI-MXI at logical

address 82 with an outward range of A0 to BF by writing the value 43A0 hex to the Logical

Address Window Register (Base/Size format).

8. Sets the logical address window of the VXI-MXI found in VXIbus Mainframe #3 at logical

address 80 to cover the devices in that mainframe (80 to 8F) and the ranges required of its

Level 2 devices: the VXI-MXI in VXIbus Mainframe #4 (A0 to AF) and the VXI-MXI in

VXIbus Mainframe #5 (B0 to BF). Enables the logical address window of the VXI-MXI at

logical address 80 with an inward range of 80 to BF by writing the value 6280 hex to the

Logical Address Window Register (Base/Size format).