VXI 320222-01 Tables

Contents

Figure 6-1. Master to Slave VMEbus/MXIbus Transfers ................................................... 6-7

Figure 6-2. Deadlock Situation............................................................................................ 6-10

Figure C-1. VXI-MXI Parts Locator Diagram..................................................................... C-2

Figure C-2. VXI-MXI INTX Parts Locator Diagram (Rear View) ..................................... C-3

Figure C-3. VXI-MXI INTX Parts Locator Diagram (Front View) .................................... C-4

Figure D-1. MXIbus Connector ........................................................................................... D-1

Figure D-2. INTX Connector............................................................................................... D-3

Figure E-1. A Two-Frame VXI System............................................................................... E-1

Figure E-2. VXI-MXI in Frame A without INTX ............................................................... E-2

Figure E-3. VXI-MXI in Frame B without INTX ............................................................... E-3

Figure E-4. VXI-MXI in Frame A with INTX .................................................................... E-4

Figure E-5. VXI-MXI in Frame B with INTX .................................................................... E-5

Tables

Table 2-1. VXI-MXI VMEbus Signals.............................................................................. 2-1

Table 2-2. MXIbus Transceiver Requirements.................................................................. 2-2

Table 2-3. VXI-MXI VMEbus Compliance Levels........................................................... 2-3

Table 3-1. MXIbus System Power Cycling Requirements ................................................ 3-30

Table 4-1. VXI-MXI Register Map ................................................................................... 4-2

Table 5-1. Base and Size Combinations ............................................................................ 5-3

Table 5-2. Example VXIbus/MXIbus System Required Logical Addresses..................... 5-8

Table 5-3. Amount of A16 Space Allocated for all Size Values ....................................... 5-21

Table 5-4. Example VXIbus/MXIbus System Required A16 Space ................................. 5-25

Table 5-5. Logical Address Assignments for Example VXIbus/MXIbus System............. 5-36

Table 6-1. VXI-MXI Addresses for VMEbus Interrupt Levels......................................... 6-5

Table 6-2. VMEbus to MXIbus Address Modifier Line Map ........................................... 6-7

Table 6-3. Transfer Responses for VMEbus Address Modifiers....................................... 6-8

Table 6-4. VMEbus/MXIbus Transfer Size Comparison .................................................. 6-9

Table D-1. MXIbus Connector Signal Assignments .......................................................... D-1

Table D-2. MXIbus Signal Groupings................................................................................ D-2

Table D-3. INTX Connector Signal Assignments .............................................................. D-3

Table D-4. INTX Signal Groupings.................................................................................... D-4