VXI 320222-01 VXIbus MXIbus

General Description Chapter 2
VXI-MXI User Manual 2-6 © National Instruments Corporation
SYSFAIL*
SYSRESET*
ACFAIL*
VMEbus IRQ7-1
IRQ*
Interrupt
Circuitry
SYSFAIL, ACFAIL,
SYSRESET Logic
Daughter Card Connection
IRQ7-1
VMEbus
Address and
Address
Modifiers
Transceivers
A31-1 A32
Window
A24
Window
A16
Window
LA
Window
MXIbus
Address/Dat
a and
Address
Modifiers
Transceivers
VXI-MXI
Configuration
Registers
Parity
Check and
Generation
PAR
AD31-0
VMEbus
Data
Transceivers
D31-0
VXIbus
System
Controller
Functions MXIbus
System
Controller
Functions
VMEbus
Control Signals
Transceivers
MXIbus
Control Signals
Transceivers
MXIbus
Master Mode
State
Machine
MXIbus
Slave Mode
State
Machine
VMEbus
Requester and
Arbiter Circuitry
MXIbus
Requester and
Arbiter Circuitry
TTL and ECL
Trigger Lines
and
CLK10 Circuitry
Front
Panel
SMBs
CLK10
TTL Trigger Lines 7-0
TRG IN
TRG OUT
EXT CLK
AM5-0
AM4-0
VXIbus
MXIbus
ECL Trigger Lines 1-0
Figure 2-1. VXI-MXI Block Diagram