![](/images/new-backgrounds/1192346/19234621x1.webp)
Zhone Technologies, Inc. | IMACS Product Book, Version 4 |
CPU Card Redundancy
The IMACS CPU cards typically support redundant operation when paired with an identical CPU card. The CPUs communicate with each other once every second. If there is a problem with the standby CPU (i.e., communications transfer did not take place), an alarm is raised by the active CPU, indicating a problem with the standby CPU. The active CPU monitoring is achieved via hardwire watchdog timers on the Interface Card. The Interface Card’s hardware timers are sensing specific control points from the controlling CPU circuit pack. These timers require only 8 seconds to detect and reset to the redundant blinking CPU card.
WAN Card Redundancy
The IMACS Dual WAN cards in conjunction with a Dual WAN card with Relays support a
All IMACS WAN cards communicate with the active CPU card every
ADPCM Redundancy
The IMACS Adaptive Differential Pulse Code Modulation (ADPCM) Server card provides
System Synchronization and Clocking
The Interface card includes a Stratum 4 clock circuit, which is capable of running off its own crystal oscillator or phase locking to a 8 KHz reference clock on the back plane. Any card plugged into the back plane that connects to a
The IMACS supports a
Both the Primary and Secondary clocks can be
•IMACS system’s internal oscillator.
•Any of the WAN interfaces in the system.
•A server card such as the ATM, which can provide timing through the DS3 link.
•A user card such as the BRI.
•An external synchronization device (framed T1 and unframed E1) through an 8922 I/F card.
March 2001 | Page 7 |