Intel STL2 manual Dual Processor Operation, 3 PGA370 Socket, Termination Package, Apic Bus

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STL2 Server Board Architecture Overview

STL2 Server Board TPS

2.1.2Dual Processor Operation

The Pentium III processor interface is designed to be MP-ready. Each processor contains a local APIC section for interrupt handling. When two processors are installed, both processors must be of identical revision, core voltage, and bus/core speeds.

2.1.3PGA370 Socket

The STL2 server board provides two PGA370 sockets. These are 370-pin zero-insertion force (ZIF) sockets that a flip chip pin grid array (FC-PGA) package technology processor plugs into.

2.1.4Processor Bus Termination / Regulation / Power

The termination circuitry required by the Intel Pentium III processor bus (AGTL+) signaling environment, and the circuitry to set the AGTL+ reference voltage, are implemented directly on the processor. The STL2 server board provides VRM 8.4 compliant DC-to-DC converters to provide processor power (VCCP) at each PGA370 socket. The server board provides an embedded VRM for the primary processor and a VRM socket for the secondary processor. These are powered from the +5V supply.

2.1.5Termination Package

If a processor is not installed in a PGA370 socket, a termination package must be installed in the vacant socket to ensure reliable termination.

2.1.6APIC Bus

Interrupt notification and generation for the processors is done using an independent path between local APICs in each processor and the I/O APIC located in the IB6566 South Bridge component.

2.1.7Boxed Processors

The Intel Pentium III processor for the PGA370 socket is offered as an Intel boxed processor. Intel boxed processors are intended for system integrators who build systems from a server board and standard components.

2.1.7.1Boxed Process Fan Heatsinks

The boxed Pentium III processor for the PGA370 socket will be supplied with an unattached fan heatsink that has an integrated clip. Clearance is required around the fan heatsink to ensure unimpeded airflow for proper cooling. Note that the airflow of the fan heatsink is into the center and out of the sides of the fan heatsink. The boxed processor thermal solution must be installed by a system integrator to secure the thermal cooling solution to the processor after it is installed in the 370-pin ZIF socket.

The boxed processor’s fan heatsink requires a +12V power supply. A fan power cable is attached to the fan and connects to processor fan headers on the STL2 server board.

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Contents STL2 Server Board Revision September 22 Enterprise Platforms GroupRevision History STL2 Server Board TPS Date Revision Modifications NumberTable of Contents Table of ContentsSTL2 Server Board TPS Basic Input Output System BiosJumpers and Connectors Power Consumption STL2 Server Board TPSTable of ContentsEmbedded NIC PCI Signals List of Figures STL2 Server Board TPSList of Tables STL2 Server Board TPS List of TablesList of TablesSTL2 Server Board TPS Audience STL2 Server Board Feature OverviewPurpose STL2 Server Board TPS IntroductionSTL2 Server Board Block Diagram Introduction STL2 Server Board TPSSTL2 Server Board Block Diagram This page intentionally left blank STL2 Server Board Supported Processors Intel Pentium III Processor SubsystemSupported Processor Types Speed FSB Frequency Cache Size Core3 PGA370 Socket Processor Bus Termination / Regulation / PowerDual Processor Operation Termination Package∙ NB6635 North Bridge 3.0LE ServerWorks ServerSet III LE ChipsetMemory ∙ IB6566 South BridgeUltra160 / Ultra WideSCSI Controller PCI I/O Subsystem1 64-bit / 66 MHz PCI Subsystem Scsi Transfer Speeds Embedded Scsi Supported PCI CommandsBe 30 L Command Target Master AIC-7899 Support2 32-bit/33 MHz PCI Subsystem Network Interface Controller NICSupported Network Features Video Controller PCI Signals Video ControllerResolution Refresh Rate Hz Colors Video Controller Supported PCI CommandsBE30L Command Type Target Master Standard VGA Modes2.3 IB6566 South Bridge PCI InterfaceLegacy I/O Super I/O National* PC97317VUL Power ManagementChipset Support Components Compatibility Interrupt ControlSerial Ports Keyboard and Mouse ConnectorsPower Management Controller Parallel PortDefault I/O Apic Bios FlashExternal Device Connectors Interrupt RoutingSTL2 Baseboard Interrupt Routing Diagram PIC mode STL2 Baseboard Interrupt Routing Diagram Symmetric mode Relationship between PCI IRQ and PCI Device Device Bus Number Device Number Slot ID Signal 2316 1511PCI Ids STL2 PCI IDsRevision Page Baseboard Management Controller STL2 Server Board TPS Server ManagementSensor Number Sensor Type Monitoring Device Hardware SensorsServer Management STL2 Server Board TPS Sensor Type Sensor-Specific Event Remarks Code Offset PCI Serr Acpi EMPAC Link Mode Wake On LAN FunctionBios Overview STL2 Server Board TPS Basic Input Output System BiosBasic Input Output System Bios STL2 Server Board TPS System BiosFlash Update Utility System Flash ROM LayoutSetup Utility Operation Setup UtilityConfiguration Utilities Overview Setup Utility ScreenEnter Execute Command Entering Setup UtilityKeyboard Command Bar F1 HelpF5/- Change Value F9 Setup Defaults← → Select Menu F6/+ Change ValueMain Menu Selections Main Menu SelectionsChoices or Display Feature Only Description User Setting Processor Settings Submenu SelectionsSTL2 Server Board TPSBasic Input Output System Bios Primary Master and Slave Adapters Submenu SelectionsMemory Reconfiruation Submenu Selections Advanced Menu SelectionsAdvanced Menu Selections Peripheral Configuration Submenu Selections 10. Numlock Submenu Selections PCI Device Submenu SelectionsOption ROM Submenu Selections Security Menu Selections 11. Security Menu Selections13. Server Menu Selections 12. Secure Mode Submenu SelectionsSystem Hardware Menu Selections 14. Wake On Events Submenu Selections17. Boot Device Priority Selections Boot Menu Selections16. Boot Menu Selections 15. Console Redirection Submenu Selections18. Hard Drive Selections Cmos Memory DefinitionExit Menu Selections 19. Removable Devices SelectionsLoading the System Bios Cmos Default OverrideFlash Update Utility User-supplied Bios Code Support OEM CustomizationMSB Scan Point Mask RAM/Stack/BDA Video/Keyboard Scan Point Definitions21. User Binary Area Scan Point Definitions OEM Splash Screen Recovery ModeLanguage Area 22. Format of the User Binary Information Structure23. Port-80h Code Definition Error Messages and Error CodesPost Codes Code Meaning24. Standard Bios Port-80 Codes Beeps ReasonPage Revision 26. Post Error Messages and Codes Post Error Codes and Messages25. Recovery Bios Port-80 Codes Basic Input Output System BIOSSTL2 Server Board TPSRevision Beeps Error Cause Recommended Action BMC Revision Level Identification Identifying Bios and BMC Revision LevelsBios Revision Level Identification Running the Scsi Utility Adaptec Scsi Utility Configuration SettingsAdaptec Scsi Utility Bus Device Channel Selected Scsi Adapter27. Adaptec Scsi Utility Setup Configurations Option Recommended Setting or User Setting Display OnlyExiting Adaptec Scsi Utility This page intentionally left blank Page Jumper and connector location key for Figure STL2 Server Board TPS Jumpers and ConnectorsJumpers and Connectors STL2 Server Board TPS Back Panel location key for FigureSetting CMOS/Password Clear Jumper Block 1J15 Jumper BlocksClearing Cmos Clearing and Changing a PasswordJumper Block 1J15 Settings Perfoming a Bios Recovery Boot Setting Processor Frequency Jumper Block 5E1Jumper Block 1J15 Default Settings Setting Configuration Jumper Block 1L4Jumper Block 5E1 Settings Jumper Block 1L4 Settings ConnectorsSetting Configuration Jumper Block 6A Jumper Block 6A Settings3 I2C Power Connector P37 Main ATX Power Connector P33Auxilary ATX Power Connector P34 Speaker Connector P31 System Fan Connectors P29, P27, P11Processor Connectors P12, P36 Speaker Connector P25Svga Video Port Diskette Drive Connector P2014. Video Port Connector Pinout Serial Ports COM1 and COM2 Keyboard and Mouse ConnectorsParallel Port 18. RJ-45 LAN Connector Signals 13 RJ-45 LAN ConnectorUSB Connectors 19. USB Connectors20. Ultra Scsi Connector Pinout Ultra Scsi Connector P9Ultra160 Scsi Connector P8 21. Ultra160 Scsi ConnectorJumpers and Connectors STL2 Server Board TPS Pin Signal IDE Connector P1922. IDE Connector Pinout 18 32-Bit PCI Connector 23 -Bit PCI Connector Pinout19 64-Bit PCI Connector 24 -Bit PCI Connctor PinoutPin Description Front Panel 24-pin Connector Pinout P2325. Front Panel 24-pin Connector Pinout Jumpers and Connectors STL2 Server Board TPS This page intentionally left blank Page Calculated Power Consumption STL2 Server Board Calculated Power ConsumptionPower Consumption STL2 Server Board TPS Measured Power ConsumptionSTL2 Server Board Measured Power Consumption Devices +5V +12V Total WattageMechanical Specifications STL2 Server Board TPS Mechanical SpecificationsMechanical Specifications STL2 Server Board TPS Regulation Title Safety RegulationsRegulatory Compliance Ensure EMC Installation InstructionsEnsure Host Computer and Accessory Module Certifications Europe Prevent Power Supply OverloadPlace Battery Marking on Computer United StatesUse Only for Intended Applications Installation PrecautionsEnvironmental Limits System Office EnvironmentSystem Environmental Testing This page intentionally left blank STL2 Server Board TPS Glossary Term DefinitionReference Documents Reference Documents STL2 Server Board TPSIndex STL2 Server Board EPS IndexIndex STL2 Server Board TPS Revision

STL2 specifications

The Intel STL2, known as the Intel Storage Technology Level 2, is a robust solution designed to elevate storage management and performance for enterprise-level applications. This next-generation system is specifically tailored for organizations that demand high reliability, scalability, and efficiency in their storage solutions.

One of the primary features of the Intel STL2 is its advanced data protection mechanisms. With integrated RAID (Redundant Array of Independent Disks) support, it ensures that data remains safe, even in the event of hardware failure. RAID configurations can be easily set up and managed, allowing businesses to choose the right balance between performance and redundancy based on their unique requirements.

In terms of performance, the STL2 leverages cutting-edge SSD (Solid State Drive) integration to provide high-speed data access and reduced latency. This capability is essential for modern applications that require quick retrieval of large volumes of data, making it suitable for environments like data analytics, AI, and cloud computing.

Scalability is another significant characteristic of the Intel STL2. It is designed to grow alongside an organization’s needs, supporting a diverse range of storage architectures. Whether a company is looking to expand its data center or transition to hybrid cloud solutions, the STL2 can accommodate additional storage resources effortlessly, ensuring that performance does not degrade as storage demands increase.

Moreover, the STL2 features advanced automation and management tools that simplify storage operations. The system allows for real-time monitoring and analytics, providing insights into storage health, performance metrics, and capacity forecasts. This level of visibility enables IT teams to optimize resource utilization and proactively address potential issues before they become critical.

Another notable technology integrated into the STL2 is Intel’s Open Storage Architecture, which promotes interoperability with various software and hardware platforms. This open approach facilitates seamless integrations with existing systems and enhances flexibility within dynamic IT environments.

Lastly, Intel STL2 prioritizes energy efficiency. Its design minimizes power consumption without sacrificing performance, helping organizations reduce their operational costs and carbon footprint.

In summary, the Intel STL2 stands out in the competitive landscape of storage solutions with its focus on data protection, high performance, scalability, advanced management features, open architecture compatibility, and energy efficiency. These characteristics make it an ideal choice for businesses looking to enhance their data storage capabilities in a rapidly evolving digital landscape.