Intel STL2 manual 2.3 IB6566 South Bridge, PCI Interface

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STL2 Server Board Architecture Overview

STL2 Server Board TPS

2.4.2.3IB6566 South Bridge

The IB6566 South Bridge is a PCI device that provides multiple PCI functions in a single package: PCI-to-ISA bridge, PCI IDE interface, PCI USB controller, and power management controller. Each function within the IB6566 South Bridge has its own set of configuration registers. Once configured, each appears to the system as a distinct hardware controller sharing the same PCI bus interface.

On the STL2 baseboard, the primary role of the IB6566 South Bridge is to provide the gateway to all PC-compatible I/O devices and features. The STL2 server board uses the following IB6566 South Bridge features:

PCI interface

IDE interface

USB interface

PC-compatible timer/counters and DMA controllers

Baseboard Plug-and-Play support

General purpose I/O

Power management

APIC and 82C59 interrupt controller

Host interface for AT compatible signaling

Internal only ISA bus (no ISA expansion connectors) bridge for communication with Super I/O, BIOS flash and BMC

The following sections describe each supported feature as used on the STL2 server board.

2.4.2.3.1PCI Interface

The IB6566 South Bridge fully implements a 32-bit PCI master/slave interface, in accordance with Revision 2.2 of the PCI Local Bus Specification. On the STL2 server board, the PCI interface operates at 33 MHz, using the 5V-signaling environment.

2.4.2.3.2PCI Bus Master IDE Interface

The IB6566 South Bridge acts as a PCI-based enhanced IDE 32-bit interface controller for intelligent disk drives that have disk controller electronics on-board. The server board includes a single IDE connector, featuring 40 pins (2 x 20) that support a master and a slave device. The IDE controller provides support for an internally mounted CD-ROM.

The IDE controller has the following features:

PIO and DMA transfer modes

Mode 4 timings

Transfer rates up to 33 MBps

Buffering for PCI/IDE burst transfers

Master/slave IDE mode

Support for up to two devices

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Contents STL2 Server Board Revision September 22 Enterprise Platforms GroupRevision History STL2 Server Board TPS Date Revision Modifications NumberTable of Contents Jumpers and Connectors Basic Input Output System BiosTable of ContentsSTL2 Server Board TPS Power Consumption STL2 Server Board TPSTable of ContentsEmbedded NIC PCI Signals List of Figures STL2 Server Board TPSList of Tables STL2 Server Board TPS List of TablesList of TablesSTL2 Server Board TPS Audience STL2 Server Board Feature OverviewPurpose STL2 Server Board TPS IntroductionSTL2 Server Board Block Diagram Introduction STL2 Server Board TPSSTL2 Server Board Block Diagram This page intentionally left blank STL2 Server Board Supported Processors Intel Pentium III Processor SubsystemSupported Processor Types Speed FSB Frequency Cache Size Core3 PGA370 Socket Processor Bus Termination / Regulation / PowerDual Processor Operation Termination Package∙ NB6635 North Bridge 3.0LE ServerWorks ServerSet III LE ChipsetMemory ∙ IB6566 South Bridge1 64-bit / 66 MHz PCI Subsystem PCI I/O SubsystemUltra160 / Ultra WideSCSI Controller Scsi Transfer Speeds Embedded Scsi Supported PCI CommandsBe 30 L Command Target Master AIC-7899 Support2 32-bit/33 MHz PCI Subsystem Network Interface Controller NICSupported Network Features Video Controller PCI Signals Video ControllerResolution Refresh Rate Hz Colors Video Controller Supported PCI CommandsBE30L Command Type Target Master Standard VGA Modes2.3 IB6566 South Bridge PCI InterfaceLegacy I/O Super I/O National* PC97317VUL Power ManagementChipset Support Components Compatibility Interrupt ControlSerial Ports Keyboard and Mouse ConnectorsPower Management Controller Parallel PortDefault I/O Apic Bios FlashExternal Device Connectors Interrupt RoutingSTL2 Baseboard Interrupt Routing Diagram PIC mode STL2 Baseboard Interrupt Routing Diagram Symmetric mode Relationship between PCI IRQ and PCI Device Device Bus Number Device Number Slot ID Signal 2316 1511PCI Ids STL2 PCI IDsRevision Page Baseboard Management Controller STL2 Server Board TPS Server ManagementServer Management STL2 Server Board TPS Hardware SensorsSensor Number Sensor Type Monitoring Device Sensor Type Sensor-Specific Event Remarks Code Offset PCI Serr Acpi EMPAC Link Mode Wake On LAN FunctionBios Overview STL2 Server Board TPS Basic Input Output System BiosBasic Input Output System Bios STL2 Server Board TPS System BiosFlash Update Utility System Flash ROM LayoutSetup Utility Operation Setup UtilityConfiguration Utilities Overview Setup Utility ScreenEnter Execute Command Entering Setup UtilityKeyboard Command Bar F1 HelpF5/- Change Value F9 Setup Defaults← → Select Menu F6/+ Change ValueMain Menu Selections Main Menu SelectionsChoices or Display Feature Only Description User Setting Processor Settings Submenu SelectionsSTL2 Server Board TPSBasic Input Output System Bios Primary Master and Slave Adapters Submenu SelectionsAdvanced Menu Selections Advanced Menu SelectionsMemory Reconfiruation Submenu Selections Peripheral Configuration Submenu Selections Option ROM Submenu Selections PCI Device Submenu Selections10. Numlock Submenu Selections Security Menu Selections 11. Security Menu Selections13. Server Menu Selections 12. Secure Mode Submenu SelectionsSystem Hardware Menu Selections 14. Wake On Events Submenu Selections17. Boot Device Priority Selections Boot Menu Selections16. Boot Menu Selections 15. Console Redirection Submenu Selections18. Hard Drive Selections Cmos Memory DefinitionExit Menu Selections 19. Removable Devices SelectionsFlash Update Utility Cmos Default OverrideLoading the System Bios User-supplied Bios Code Support OEM CustomizationMSB 21. User Binary Area Scan Point Definitions Scan Point DefinitionsScan Point Mask RAM/Stack/BDA Video/Keyboard OEM Splash Screen Recovery ModeLanguage Area 22. Format of the User Binary Information Structure23. Port-80h Code Definition Error Messages and Error CodesPost Codes Code Meaning24. Standard Bios Port-80 Codes Beeps ReasonPage Revision 26. Post Error Messages and Codes Post Error Codes and Messages25. Recovery Bios Port-80 Codes Basic Input Output System BIOSSTL2 Server Board TPSRevision Beeps Error Cause Recommended Action Bios Revision Level Identification Identifying Bios and BMC Revision LevelsBMC Revision Level Identification Running the Scsi Utility Adaptec Scsi Utility Configuration SettingsAdaptec Scsi Utility Bus Device Channel Selected Scsi Adapter27. Adaptec Scsi Utility Setup Configurations Option Recommended Setting or User Setting Display OnlyExiting Adaptec Scsi Utility This page intentionally left blank Page Jumper and connector location key for Figure STL2 Server Board TPS Jumpers and ConnectorsJumpers and Connectors STL2 Server Board TPS Back Panel location key for FigureSetting CMOS/Password Clear Jumper Block 1J15 Jumper BlocksJumper Block 1J15 Settings Clearing and Changing a PasswordClearing Cmos Perfoming a Bios Recovery Boot Setting Processor Frequency Jumper Block 5E1Jumper Block 5E1 Settings Setting Configuration Jumper Block 1L4Jumper Block 1J15 Default Settings Jumper Block 1L4 Settings ConnectorsSetting Configuration Jumper Block 6A Jumper Block 6A SettingsAuxilary ATX Power Connector P34 Main ATX Power Connector P333 I2C Power Connector P37 Speaker Connector P31 System Fan Connectors P29, P27, P11Processor Connectors P12, P36 Speaker Connector P2514. Video Port Connector Pinout Diskette Drive Connector P20Svga Video Port Parallel Port Keyboard and Mouse ConnectorsSerial Ports COM1 and COM2 18. RJ-45 LAN Connector Signals 13 RJ-45 LAN ConnectorUSB Connectors 19. USB Connectors20. Ultra Scsi Connector Pinout Ultra Scsi Connector P9Ultra160 Scsi Connector P8 21. Ultra160 Scsi Connector22. IDE Connector Pinout IDE Connector P19Jumpers and Connectors STL2 Server Board TPS Pin Signal 18 32-Bit PCI Connector 23 -Bit PCI Connector Pinout19 64-Bit PCI Connector 24 -Bit PCI Connctor Pinout25. Front Panel 24-pin Connector Pinout Front Panel 24-pin Connector Pinout P23Pin Description Jumpers and Connectors STL2 Server Board TPS This page intentionally left blank Page Calculated Power Consumption STL2 Server Board Calculated Power ConsumptionPower Consumption STL2 Server Board TPS Measured Power ConsumptionSTL2 Server Board Measured Power Consumption Devices +5V +12V Total WattageMechanical Specifications STL2 Server Board TPS Mechanical SpecificationsMechanical Specifications STL2 Server Board TPS Regulatory Compliance Safety RegulationsRegulation Title Ensure Host Computer and Accessory Module Certifications Installation InstructionsEnsure EMC Europe Prevent Power Supply OverloadPlace Battery Marking on Computer United StatesUse Only for Intended Applications Installation PrecautionsEnvironmental Limits System Office EnvironmentSystem Environmental Testing This page intentionally left blank STL2 Server Board TPS Glossary Term DefinitionReference Documents Reference Documents STL2 Server Board TPSIndex STL2 Server Board EPS IndexIndex STL2 Server Board TPS Revision

STL2 specifications

The Intel STL2, known as the Intel Storage Technology Level 2, is a robust solution designed to elevate storage management and performance for enterprise-level applications. This next-generation system is specifically tailored for organizations that demand high reliability, scalability, and efficiency in their storage solutions.

One of the primary features of the Intel STL2 is its advanced data protection mechanisms. With integrated RAID (Redundant Array of Independent Disks) support, it ensures that data remains safe, even in the event of hardware failure. RAID configurations can be easily set up and managed, allowing businesses to choose the right balance between performance and redundancy based on their unique requirements.

In terms of performance, the STL2 leverages cutting-edge SSD (Solid State Drive) integration to provide high-speed data access and reduced latency. This capability is essential for modern applications that require quick retrieval of large volumes of data, making it suitable for environments like data analytics, AI, and cloud computing.

Scalability is another significant characteristic of the Intel STL2. It is designed to grow alongside an organization’s needs, supporting a diverse range of storage architectures. Whether a company is looking to expand its data center or transition to hybrid cloud solutions, the STL2 can accommodate additional storage resources effortlessly, ensuring that performance does not degrade as storage demands increase.

Moreover, the STL2 features advanced automation and management tools that simplify storage operations. The system allows for real-time monitoring and analytics, providing insights into storage health, performance metrics, and capacity forecasts. This level of visibility enables IT teams to optimize resource utilization and proactively address potential issues before they become critical.

Another notable technology integrated into the STL2 is Intel’s Open Storage Architecture, which promotes interoperability with various software and hardware platforms. This open approach facilitates seamless integrations with existing systems and enhances flexibility within dynamic IT environments.

Lastly, Intel STL2 prioritizes energy efficiency. Its design minimizes power consumption without sacrificing performance, helping organizations reduce their operational costs and carbon footprint.

In summary, the Intel STL2 stands out in the competitive landscape of storage solutions with its focus on data protection, high performance, scalability, advanced management features, open architecture compatibility, and energy efficiency. These characteristics make it an ideal choice for businesses looking to enhance their data storage capabilities in a rapidly evolving digital landscape.