Intel STL2 manual Supported Network Features

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STL2 Server Board TPS

STL2 Server Board Architecture Overview

The 82559 is a highly integrated PCI LAN controller for 10 or 100 Mbps Fast Ethernet networks. As a PCI bus master, the 82559 can burst data at up to 132 MBps. This high- performance bus master interface can eliminate the intermediate copy step in RX/TX frame copies, resulting in faster frame processing.

The network OS communicates with the 82559 using a memory-mapped I/O interface, PCI interrupt connected directly to the ICH, and two large receive and transmit FIFOs. The receive and transmit FIFOs prevent data overruns or underruns while waiting for access to the PCI bus, and also enable back-to-back frame transmission within the minimum 960ns inter-frame spacing. The figure below shows the PCI signals supported by the 82559:

i82559 NIC

AD[31::0] C/BE[3::0]_L PAR FRAME_L TRDY_L IRDY_L STOP_L DEVSEL_L IDSEL REQ_L GNT_L PCI_CLK RST_L PERR_L SERR_L

PCI_INT_L

Figure 2-1. Embedded NIC PCI Signals

2.4.2.1.1Supported Network Features

The 82559 contains an IEEE MII compliant interface to the components necessary to implement an IEEE 802.3 100Base TX network connection. The STL2 supports the following features of the 82559 controller:

Glueless 32-bit PCI Bus Master Interface (Direct Drive of Bus), compatible with PCI Bus Specification, revision 2.1 / 2.2.

Chained memory structure, with improved dynamic transmit chaining for enhanced performance.

Programmable transmit threshold for improved bus utilization.

Early receive interrupt for concurrent processing of receive data.

On-chip counters for network management.

Autodetect and autoswitching for 10 or 100 Mbps network speeds.

Support for both 10 Mbps and 100 Mbps networks, full or half duplex-capable, with back-to-back transmit at 100 Mbps.

Revision 1.0

2-11

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Contents Revision September 22 Enterprise Platforms Group STL2 Server BoardDate Revision Modifications Number Revision History STL2 Server Board TPSTable of Contents Jumpers and Connectors Basic Input Output System BiosTable of ContentsSTL2 Server Board TPS STL2 Server Board TPSTable of Contents Power ConsumptionList of Figures STL2 Server Board TPS Embedded NIC PCI SignalsSTL2 Server Board TPS List of Tables List of TablesList of TablesSTL2 Server Board TPS STL2 Server Board TPS Introduction STL2 Server Board Feature OverviewPurpose AudienceIntroduction STL2 Server Board TPS STL2 Server Board Block DiagramSTL2 Server Board Block Diagram This page intentionally left blank Speed FSB Frequency Cache Size Core Intel Pentium III Processor SubsystemSupported Processor Types STL2 Server Board Supported ProcessorsTermination Package Processor Bus Termination / Regulation / PowerDual Processor Operation 3 PGA370 Socket∙ IB6566 South Bridge ServerWorks ServerSet III LE ChipsetMemory ∙ NB6635 North Bridge 3.0LE1 64-bit / 66 MHz PCI Subsystem PCI I/O SubsystemUltra160 / Ultra WideSCSI Controller AIC-7899 Support Embedded Scsi Supported PCI CommandsBe 30 L Command Target Master Scsi Transfer SpeedsNetwork Interface Controller NIC 2 32-bit/33 MHz PCI SubsystemSupported Network Features Video Controller Video Controller PCI SignalsStandard VGA Modes Video Controller Supported PCI CommandsBE30L Command Type Target Master Resolution Refresh Rate Hz ColorsPCI Interface 2.3 IB6566 South BridgeCompatibility Interrupt Control Power ManagementChipset Support Components Legacy I/O Super I/O National* PC97317VULParallel Port Keyboard and Mouse ConnectorsPower Management Controller Serial PortsInterrupt Routing Bios FlashExternal Device Connectors Default I/O ApicSTL2 Baseboard Interrupt Routing Diagram PIC mode STL2 Baseboard Interrupt Routing Diagram Symmetric mode STL2 PCI IDs Device Bus Number Device Number Slot ID Signal 2316 1511PCI Ids Relationship between PCI IRQ and PCI DeviceRevision Page STL2 Server Board TPS Server Management Baseboard Management ControllerServer Management STL2 Server Board TPS Hardware SensorsSensor Number Sensor Type Monitoring Device Sensor Type Sensor-Specific Event Remarks Code Offset PCI Serr EMP AcpiWake On LAN Function AC Link ModeSTL2 Server Board TPS Basic Input Output System Bios Bios OverviewSystem Flash ROM Layout System BiosFlash Update Utility Basic Input Output System Bios STL2 Server Board TPSSetup Utility Screen Setup UtilityConfiguration Utilities Overview Setup Utility OperationF1 Help Entering Setup UtilityKeyboard Command Bar Enter Execute CommandF6/+ Change Value F9 Setup Defaults← → Select Menu F5/- Change ValueMain Menu Selections Main Menu SelectionsPrimary Master and Slave Adapters Submenu Selections Processor Settings Submenu SelectionsSTL2 Server Board TPSBasic Input Output System Bios Choices or Display Feature Only Description User SettingAdvanced Menu Selections Advanced Menu SelectionsMemory Reconfiruation Submenu Selections Peripheral Configuration Submenu Selections Option ROM Submenu Selections PCI Device Submenu Selections10. Numlock Submenu Selections 11. Security Menu Selections Security Menu Selections14. Wake On Events Submenu Selections 12. Secure Mode Submenu SelectionsSystem Hardware Menu Selections 13. Server Menu Selections15. Console Redirection Submenu Selections Boot Menu Selections16. Boot Menu Selections 17. Boot Device Priority Selections19. Removable Devices Selections Cmos Memory DefinitionExit Menu Selections 18. Hard Drive SelectionsFlash Update Utility Cmos Default OverrideLoading the System Bios OEM Customization User-supplied Bios Code SupportMSB 21. User Binary Area Scan Point Definitions Scan Point DefinitionsScan Point Mask RAM/Stack/BDA Video/Keyboard 22. Format of the User Binary Information Structure Recovery ModeLanguage Area OEM Splash ScreenCode Meaning Error Messages and Error CodesPost Codes 23. Port-80h Code DefinitionBeeps Reason 24. Standard Bios Port-80 CodesPage Revision Basic Input Output System BIOSSTL2 Server Board TPS Post Error Codes and Messages25. Recovery Bios Port-80 Codes 26. Post Error Messages and CodesRevision Beeps Error Cause Recommended Action Bios Revision Level Identification Identifying Bios and BMC Revision LevelsBMC Revision Level Identification Bus Device Channel Selected Scsi Adapter Adaptec Scsi Utility Configuration SettingsAdaptec Scsi Utility Running the Scsi UtilityOption Recommended Setting or User Setting Display Only 27. Adaptec Scsi Utility Setup ConfigurationsExiting Adaptec Scsi Utility This page intentionally left blank Page STL2 Server Board TPS Jumpers and Connectors Jumper and connector location key for FigureBack Panel location key for Figure Jumpers and Connectors STL2 Server Board TPSJumper Blocks Setting CMOS/Password Clear Jumper Block 1J15Jumper Block 1J15 Settings Clearing and Changing a PasswordClearing Cmos Setting Processor Frequency Jumper Block 5E1 Perfoming a Bios Recovery BootJumper Block 5E1 Settings Setting Configuration Jumper Block 1L4Jumper Block 1J15 Default Settings Jumper Block 6A Settings ConnectorsSetting Configuration Jumper Block 6A Jumper Block 1L4 SettingsAuxilary ATX Power Connector P34 Main ATX Power Connector P333 I2C Power Connector P37 Speaker Connector P25 System Fan Connectors P29, P27, P11Processor Connectors P12, P36 Speaker Connector P3114. Video Port Connector Pinout Diskette Drive Connector P20Svga Video Port Parallel Port Keyboard and Mouse ConnectorsSerial Ports COM1 and COM2 19. USB Connectors 13 RJ-45 LAN ConnectorUSB Connectors 18. RJ-45 LAN Connector Signals21. Ultra160 Scsi Connector Ultra Scsi Connector P9Ultra160 Scsi Connector P8 20. Ultra Scsi Connector Pinout22. IDE Connector Pinout IDE Connector P19Jumpers and Connectors STL2 Server Board TPS Pin Signal 23 -Bit PCI Connector Pinout 18 32-Bit PCI Connector24 -Bit PCI Connctor Pinout 19 64-Bit PCI Connector25. Front Panel 24-pin Connector Pinout Front Panel 24-pin Connector Pinout P23Pin Description Jumpers and Connectors STL2 Server Board TPS This page intentionally left blank Page STL2 Server Board Calculated Power Consumption Calculated Power ConsumptionDevices +5V +12V Total Wattage Measured Power ConsumptionSTL2 Server Board Measured Power Consumption Power Consumption STL2 Server Board TPSSTL2 Server Board TPS Mechanical Specifications Mechanical SpecificationsMechanical Specifications STL2 Server Board TPS Regulatory Compliance Safety RegulationsRegulation Title Ensure Host Computer and Accessory Module Certifications Installation InstructionsEnsure EMC United States Prevent Power Supply OverloadPlace Battery Marking on Computer EuropeSystem Office Environment Installation PrecautionsEnvironmental Limits Use Only for Intended ApplicationsSystem Environmental Testing This page intentionally left blank Term Definition STL2 Server Board TPS GlossaryReference Documents STL2 Server Board TPS Reference DocumentsSTL2 Server Board EPS Index IndexIndex STL2 Server Board TPS Revision

STL2 specifications

The Intel STL2, known as the Intel Storage Technology Level 2, is a robust solution designed to elevate storage management and performance for enterprise-level applications. This next-generation system is specifically tailored for organizations that demand high reliability, scalability, and efficiency in their storage solutions.

One of the primary features of the Intel STL2 is its advanced data protection mechanisms. With integrated RAID (Redundant Array of Independent Disks) support, it ensures that data remains safe, even in the event of hardware failure. RAID configurations can be easily set up and managed, allowing businesses to choose the right balance between performance and redundancy based on their unique requirements.

In terms of performance, the STL2 leverages cutting-edge SSD (Solid State Drive) integration to provide high-speed data access and reduced latency. This capability is essential for modern applications that require quick retrieval of large volumes of data, making it suitable for environments like data analytics, AI, and cloud computing.

Scalability is another significant characteristic of the Intel STL2. It is designed to grow alongside an organization’s needs, supporting a diverse range of storage architectures. Whether a company is looking to expand its data center or transition to hybrid cloud solutions, the STL2 can accommodate additional storage resources effortlessly, ensuring that performance does not degrade as storage demands increase.

Moreover, the STL2 features advanced automation and management tools that simplify storage operations. The system allows for real-time monitoring and analytics, providing insights into storage health, performance metrics, and capacity forecasts. This level of visibility enables IT teams to optimize resource utilization and proactively address potential issues before they become critical.

Another notable technology integrated into the STL2 is Intel’s Open Storage Architecture, which promotes interoperability with various software and hardware platforms. This open approach facilitates seamless integrations with existing systems and enhances flexibility within dynamic IT environments.

Lastly, Intel STL2 prioritizes energy efficiency. Its design minimizes power consumption without sacrificing performance, helping organizations reduce their operational costs and carbon footprint.

In summary, the Intel STL2 stands out in the competitive landscape of storage solutions with its focus on data protection, high performance, scalability, advanced management features, open architecture compatibility, and energy efficiency. These characteristics make it an ideal choice for businesses looking to enhance their data storage capabilities in a rapidly evolving digital landscape.