Intel IXP12xx manual Resource Utilization and Headroom Analysis

Version 1.0, 4/10/02

RESOURCE UTILIZATION AND HEADROOM ANALYSIS

This section details system resource utilization, including per-microengine resources such as registers and microstore instructions; as well as shared resources such as Scratchpad RAM, SRAM, and DRAM. The memory utilization is shown using the default system memory map as shipped.3 One of the ATM utilities, config_print(), prints out the Scratchpad RAM, SRAM, and DRAM address maps to show the memory map in detail. Almost all of the data structure sizes in these memories are configurable.

Microengine Register and Microstore Headroom

Register utilization is measured by using the free_register_test() macro to soak up all available registers. This is an iterative process – the macro either prints out how many registers it successfully allocated, or the assembler quits because it failed to allocate the requested registers. In this analysis this macro is applied at the global level, so the result is worst-case. It is generally possible to allocate more registers if their scope does not overlap the deepest scope in the design.

		Available	Available	Available
Microengine		General	SRAM	SDRAM	Available
		Purpose	Transfer	Transfer	Threads
		Registers	Registers	Registers
	Configuration 1 – IXP1240 1xOC-12, 8xEthernet
					0
ATM Receive		2	0	5
IP Route		11	4	0	0
Ethernet Receive		1	0	0	0
(2 microengines)		1	0	0	0
ATM Transmit		12	3	2	1
Ethernet Transmit		5	0	6	0
	Configuration 2 – IXP1240 4xOC-3, 8xEthernet
					0
ATM Receive		12	0	6
IP Route		11	4	0	0
Ethernet Receive		1	0	0	0
(2 microengines)		1	0	0	0
ATM Transmit		8	1	2	0
Ethernet Transmit		5	0	6	0
	Configuration 3 – IXP1200 2xOC-3, 4xEthernet
ATM Receive		9	0	0	0
& IP Route
					0
Ethernet Receive		1	0	0
CRC Check		12	3	2	0
CRC Generate		16	0	2	0
ATM Transmit		8	1	4	2
Ethernet Transmit		5	0	6	0

Figure 12 – Microengine register and microstore headroom

Available

Microstore

Instructions

1514

1677

1363

1363

1728

1235

1724

1677

1348

1348

1716

1235

1403

1370

1811

1847

1805

1235

3So that a single version of the ATM utilities in the foreign model DLL and the vxWorks utilities could handle any configuration, all three port configurations (IXP1240 1xOC12, IXP1240 4xOC3, and IXP1200 2xOC3) use the same memory map.

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