Intel ECB-865 user manual System

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User’s Manual

3.11.38.2System

CLK

Clock provides timing for all transactions on PCI and is an input to every PCI device.

 

All other PCI signals, except RST#, INTA#, INTB#, INTC#, and INTD#, are sampled

 

on the rising edge of CLK and all other timing parameters are defined with respect to

 

this edge. PCI operates up to 33 MHz or 66 MHz and, in general, the minimum

 

frequency is DC (0 Hz).

RST#

Reset is used to bring PCI-specific registers, sequencers, and signals to a consistent

 

state. What effect RST# has on a device beyond the PCI sequencer is beyond the

 

scope of this specification, except for reset states of required PCI configuration

 

registers. Anytime RST# is asserted, all PCI output signals must be driven to their

 

benign state. In general, this means they must be asynchronously tri-stated. SERR#

 

(open drain) is floated. REQ# and GNT# must both be tri-stated (they cannot be

 

driven low or high during reset). To prevent AD, C/BE#, and PAR signals from

 

floating during reset, the central resource may drive these lines during reset (bus

 

parking) but only to a logic low level–they may not be driven high. RST# may be

 

asynchronous to CLK when asserted or deasserted. Although asynchronous,

 

deassertion is guaranteed to be a clean, bounce-free edge. Except for configuration

 

accesses, only devices that are required to boot the system will respond after reset.

46ECB-865 User’s Manual

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Contents User’s Manual ECB-865 FCC Statement Copyright Notice Trademark AcknowledgementDisclaimer Life Support PolicyEvalue Customer Services Message to the CustomerTechnical Support Evalue Technology Inc Evalue Europe A/SProduct Warranty Packing List Watchdog Timer Programming Jumper & Connector Manual Objectives IntroductionEntering Setup Setting JumpersConnector Definitions Map Document Amendment History Revision Date CommentManual Objectives Introduction System OverviewSystem Specifications Chipset ITE IT8712F-AExpansion Interface Weight 0.5 Kg Mechanical and EnvironmentalArchitecture Overview 1 82815 Gmch and 82801BA AGP Interface Dram InterfaceMultiplexed AGP and Display Cache Interface Ethernet 7.1 ICH2 LAN Controller PCI Interface6 USB Systems DiskOnChip IntelITE IT8712F-A Safety Precautions Hardware ConfigurationInstallation Procedure Removing CPU Main MemorySystems’ DiskOnChip Flash Disk Installing DOCExpansion Interface Installing the Single Board Computer 1 815E integrated Graphics Controller Drivers Support Watchdog Timer Programming Enable WDTDisable WDT Re-trigger WDTJumper & Connector Jumper & Connector Layout Jumper & Connector List Jumpers Label FunctionJP10 JP11Connectors Label Function J10J11 J12Setting Jumpers Watchdog Timer Enable / Disable Onboard Watchdog Timer JP12 Watchdog Timer Programming I/O Address Select JP6Clear Cmos JP9 0553H / 0033H 0543H / 0343HWatchdog Timer Time-Out Interval Select JP10 SecJP10 16 Sec 32 Sec 64 Sec 10.3 COM2 RS-232/422/485 Select JP1, JP2~JP5Bus Master Systems DiskOnChip Memory Address Select JP11Proprietary PCI Bus Master Selection JP13 Connector Definitions System Reset Connector J1 External Speaker Connector J2Keyboard Lock & Power Indicator Connector J3 Primary IDE / Secondary IDE Active Indicator Connector J4Primary IDE Connector J5 Secondary IDE Connector J10 ECB-865 Primary Master connector STROBE, with the PIIX4 latching RESET# Floppy Connector J6 Signal Description Floppy Connector J6 DRVDEN0/1#ATX Power Button Connector J8 Parallel Port Connector J1111.12 DB25 Parallel Port Connector J11 Signal Description Parallel Port Connector J11 STB#GND DTR CTS CTS RTS DSR GND CTS/RTS + USB Connector J13, J19 Signal Description USB Connector J13, J19CPU Fan and System Fan Connector J14, J25 Fast & Standard IrDA Connector J15Smart Card Interface J17 Signal Configuration Fast & Standard IrDA Connector J15ATX Power Controller J16 11.28 10/100 BASE-Tx Ethernet Connector J18, J20 Signal Description 10/100Base-Tx Ethernet Connector J18, J20CRT Connector J22 Signal Description CRT Connector J22Internal Keyboard Connector J24 11.33 PS/2 Keyboard Connector J26Signal Description Int. & PS/2 Keyboard Connector J24, J26 11.35 PS/2 Mouse Connector J26Proprietary PCI Connector J21 Write bursts System Interface Control Error Reporting ArbitrationInterrupts AMI Bios Setup Press F1 to Run Setup or ResumeAMI Bios Setup Main Menu Enter key to accept or enter the sub-menuCmos Setup Reference Table Standard Cmos Setup MenuDate and Time Configuration Floppy A, Floppy BBoot Sector Virus Protection Master Disk, Slave DiskAdvanced Cmos Setup Defaults Quick Boot2.2 1st / 2nd / 3rd Boot Device Try Other Boot DeviceBootUp Num-Lock Password CheckShadow Memory from Address C000~DFFF, 16K Per Segment Boot To OS/2System Bios Cacheable CPU Ratio Selection Advanced Chipset Setup DefaultsICH Delayed Transaction Sdram RAS# to CAS# Delay Internal Graphic Mode SelectMemory Hole Dram Cycle time SCLKsPower Management Setup Defaults Power Management/ APMGreen PC Monitor Power State Acpi Aware O/SCPU Critical Temperature Stand by Time Out MinuteSuspend Time Out Minute Throttle Slow Clock RatioWake Up on LAN Power Button FunctionWake Up on Ring PCI / Plug and Play Setup Defaults Plug and Play Aware O/SPCI Latency Timer PCI Clocks Clear NvramPCI / VGA Palette Snoop Allocate IRQ to PCI VGAPeripheral Setup Defaults OnBoard FDCOnBoard Serial Port1 OnBoard Serial Port2Disabled Parallel Port ModeOn Board Parallel Port 378hOn-Chip IDE Parallel Port IRQParallel Port DMA Channel Hardware Monitor Setup Defaults User’s Manual Driver Installation Driver Installation for Ethernet Adapter WindowsUser’s Manual ECB-865 User’s Manual ECB-865 Windows NT 4.0 Ethernet Installation ECB-865 User’s Manual ECB-865 User’s Manual Driver Installation for Display Adapter Windows User’s Manual ECB-865 User’s Manual ECB-865 Windows NT 4.0 Display Installation ECB-865 User’s Manual ECB-865 Measurement Drawing Appendix a Bios Revisions Bios Rev New Features Bugs/Problems Solved Known ProblemsAppendix B System Resources Memory MapMap Port DescriptionUser’s Manual Interrupt Usage Interrupt DescriptionDMA-channel Usage DMA-channel DescriptionAppendix C Amibios Power-On Self Test If it beeps… Then…Appendix D Amibios Post Check Point List Code DescriptionBios User’s Manual Present User’s Manual ECB-865 User’s Manual