Intel BX80646I54430, CM8064601466200, CM8064601466003, BX80646I74770 Signal Name, Ball #, continued

Page 114
Manual background
December 2013 Order No.: 328897-004

 

 

 

 

Processor—Processor Ball and Signal Information

 

 

 

 

 

 

 

 

 

Signal Name

Ball #

 

Signal Name

 

Ball #

 

Signal Name

Ball #

 

 

 

 

 

 

 

 

 

SB_DQ3

AH35

 

SB_DQ62

 

AF6

 

SB_MA13

AR15

 

 

 

 

 

 

 

 

 

SB_DQ30

AP29

 

SB_DQ63

 

AF7

 

SB_MA14

AV27

 

 

 

 

 

 

 

 

 

SB_DQ31

AP28

 

SB_DQ7

 

AH34

 

SB_MA15

AY28

 

 

 

 

 

 

 

 

 

SB_DQ32

AR12

 

SB_DQ8

 

AL34

 

SB_MA2

AM22

 

 

 

 

 

 

 

 

 

SB_DQ33

AP12

 

SB_DQ9

 

AL35

 

SB_MA3

AM23

 

 

 

 

 

 

 

 

 

SB_DQ34

AL13

 

SB_DQS0

 

AF35

 

SB_MA4

AP23

 

 

 

 

 

 

 

 

 

SB_DQ35

AL12

 

SB_DQS1

 

AL33

 

SB_MA5

AL23

 

 

 

 

 

 

 

 

 

SB_DQ36

AR13

 

SB_DQS2

 

AP33

 

SB_MA6

AY24

 

 

 

 

 

 

 

 

 

SB_DQ37

AP13

 

SB_DQS3

 

AN28

 

SB_MA7

AV25

 

 

 

 

 

 

 

 

 

SB_DQ38

AM13

 

SB_DQS4

 

AN12

 

SB_MA8

AU26

 

 

 

 

 

 

 

 

 

SB_DQ39

AM12

 

SB_DQS5

 

AP8

 

SB_MA9

AW25

 

 

 

 

 

 

 

 

 

SB_DQ4

AD34

 

SB_DQS6

 

AL8

 

SB_ODT0

AM17

 

 

 

 

 

 

 

 

 

SB_DQ40

AR9

 

SB_DQS7

 

AG7

 

SB_ODT1

AL16

 

 

 

 

 

 

 

 

 

SB_DQ41

AP9

 

SB_DQS8

 

AN25

 

SB_ODT2

AM16

 

 

 

 

 

 

 

 

 

SB_DQ42

AR6

 

SB_DQSN0

 

AF34

 

SB_ODT3

AK15

 

 

 

 

 

 

 

 

 

SB_DQ43

AP6

 

SB_DQSN1

 

AK33

 

SB_RAS#

AM18

 

 

 

 

 

 

 

 

 

SB_DQ44

AR10

 

SB_DQSN2

 

AN33

 

SB_WE#

AK16

 

 

 

 

 

 

 

 

 

SB_DQ45

AP10

 

SB_DQSN3

 

AN29

 

SKTOCC#

D38

 

 

 

 

 

 

 

 

 

SB_DQ46

AR7

 

SB_DQSN4

 

AN13

 

SM_DRAMPWRO

AK21

 

 

 

 

 

 

 

K

 

SB_DQ47

AP7

 

SB_DQSN5

 

AR8

 

 

 

 

 

 

 

 

 

SM_DRAMRST#

AK22

 

 

 

 

 

 

 

SB_DQ48

AM9

 

SB_DQSN6

 

AM8

 

 

 

 

 

 

 

 

SM_RCOMP0

R1

 

 

 

 

 

 

 

SB_DQ49

AL9

 

SB_DQSN7

 

AG6

 

 

 

 

 

 

 

 

SM_RCOMP1

P1

 

 

 

 

 

 

 

SB_DQ5

AD35

 

SB_DQSN8

 

AN26

 

 

 

 

 

 

 

 

SM_RCOMP2

R2

 

 

 

 

 

 

 

SB_DQ50

AL6

 

SB_ECC_CB0

 

AM26

 

 

 

 

 

 

 

 

SM_VREF

AB38

 

 

 

 

 

 

 

SB_DQ51

AL7

 

SB_ECC_CB1

 

AM25

 

 

 

 

 

 

 

 

SSC_DPLL_REF_

U5

 

 

 

 

 

 

 

SB_DQ52

AM10

 

SB_ECC_CB2

 

AP25

 

 

 

CLKN

 

 

 

 

 

 

 

 

 

 

SB_DQ53

AL10

 

SB_ECC_CB3

 

AP26

 

SSC_DPLL_REF_

U6

 

 

 

 

 

 

 

CLKP

 

SB_DQ54

AM6

 

SB_ECC_CB4

 

AL26

 

 

 

 

 

 

 

 

 

TCK

D39

 

 

 

 

 

 

 

SB_DQ55

AM7

 

SB_ECC_CB5

 

AL25

 

 

 

 

 

 

 

 

TDI

F38

 

 

 

 

 

 

 

SB_DQ56

AH6

 

SB_ECC_CB6

 

AR26

 

 

 

 

 

 

 

 

TDO

F39

 

 

 

 

 

 

 

SB_DQ57

AH7

 

SB_ECC_CB7

 

AR25

 

 

 

 

 

 

 

 

TESTLO_N5

N5

 

 

 

 

 

 

 

SB_DQ58

AE6

 

SB_MA0

 

AL19

 

 

 

 

 

 

 

 

TESTLO_P6

P6

 

 

 

 

 

 

 

SB_DQ59

AE7

 

SB_MA1

 

AK23

 

 

 

 

 

 

 

 

THERMTRIP#

F37

 

 

 

 

 

 

 

SB_DQ6

AG34

 

SB_MA10

 

AP18

 

 

 

 

 

 

 

 

TMS

E39

 

 

 

 

 

 

 

SB_DQ60

AJ6

 

SB_MA11

 

AY25

 

 

 

 

 

 

 

 

TRST#

E37

 

 

 

 

 

 

 

SB_DQ61

AJ7

 

SB_MA12

 

AV26

 

 

 

 

 

 

 

 

 

 

 

 

 

continued...

 

continued...

 

 

 

continued...

 

 

 

Desktop 4th Generation Intel® CoreProcessor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family

Datasheet – Volume 1 of 2 114

Image 114
Contents Datasheet - Volume 1 of DecemberDatasheet - Volume 1 of 2 Revision History Contents4.0 Power Management 1.0 Introduction6.0 Signal Description Processor-Contents5.0 Thermal Management 9.0 Processor Ball and Signal Information 7.0 Electrical Specifications8.0 Package Mechanical Specifications 7.8.1 Platform Environment Control Interface PECI DC CharacteristicsFigures Tables Tables-ProcessorProcessor-Tables Revision History Revision History-Processor1.0 Introduction Processor-IntroductionProcessor Figure 1. Platform Block Diagram1.1 Supported Technologies Platform Controller Hub PCHProcessor Core 1.3 Power Management Support1.2 Interfaces System1.6 Terminology 1.4 Thermal Management Support1.5 Package Support Terminologywith Virtual Machine Monitor software, enables multiple, robust independent software Description Document 1.7 Related DocumentsRelated Documents Number / Locationproducts/processor specificationshttp manuals/index.htm2.0 Interfaces 2.1 System Memory InterfaceSupported UDIMM Module Configurations 2.1.1 System Memory Technology SupportedProcessor DIMM Support by Product Supported SO-DIMM Module Configurations AIO Only 2.1.2 System Memory Timing SupportDDR3 / DDR3L System Memory Timing Support Dual-Channel Mode - Intel Flex Memory Technology Mode 2.1.3 System Memory Organization ModesSingle-Channel Mode Figure 2. Intel Flex Memory Technology OperationsCommand Overlap 2.1.3.2 Intel Fast Memory Access Intel FMA Technology EnhancementsJust-in-Time Command Scheduling 2.1.3.1 System Memory Frequency2.2.1 PCI Express* Support Table 7. PCI Express* Supported Configurations in Desktop Products2.2 PCI Express* Interface 2.1.3.3 Data Scrambling2.2.3 PCI Express* Configuration Mechanism 2.2.2 PCI Express* ArchitecturePCI Express* Related Register Structures in the Processor PCI Express* PortPCI Express* Lanes Connection 1 X 4 Controller 2.3 Direct Media Interface DMIFigure 4. PCI Express* Typical Operation 16 Lanes Mapping 1 X 8 ControllerDMI Error Flow DMI Link Down2.4 Processor Graphics 2.5 Processor Graphics Controller GT3D Pipeline Figure 5. Processor Graphics Controller Unit Block Diagram2.5.1 3D and Video Engines for Graphics Processing 3D Engine Execution UnitsClip Stage Vertex Shader VS StageGeometry Shader GS Stage Strips and Fans SF Stage2.6 Digital Display Interface DDI 2.5.2 Multi Graphics Controllers Multi-Monitor SupportLogical 128-Bit Fixed BLT and 256 Fill Engine Figure 6. Processor Display Architecture DisplayPort Source DeviceSink Device Figure 7. DisplayPort* OverviewFigure 8. HDMI* Overview HDMI SourceHDMI Sink HDMI TxIntegrated Audio Multiple Display Configurationsembedded DisplayPort Table 8. Processor Supported Audio Formats over HDMI*and DisplayPortValid Three Display Configurations through the Processor High-bandwidth Digital Content Protection HDCP2.7 Intel Flexible Display Interface Intel FDI 2.8 Platform Environmental Control Interface PECI2.8.1 PECI Bus Architecture Host / Originator Figure 9. PECI Host-Clients Connection ExamplePECI PECI ClientIntel VT-x Objectives 3.0 Technologies3.1 Intel Virtualization Technology Intel VT ing=VTIntel VT-x Features Intel VT-d Objectives Intel VT-d Features Figure 10. Device to Domain Mapping Structures3.2 Intel Trusted Execution Technology Intel TXT 3.3 Intel Hyper-Threading Technology Intel HT Technology 3.4 Intel Turbo Boost Technology 3.5 Intel Advanced Vector Extensions 2.0 Intel AVX2Intel Turbo Boost Technology 2.0 Frequency 3.6 Intel Advanced Encryption Standard New Instructions Intel AES-NI PCLMULQDQ InstructionIntel Secure Key 3.8 Intel 64 Architecture x2APIC 3.9 Power Aware Interrupt Routing PAIR 3.10 Execute Disable Bit3.11 Supervisor Mode Execution Protection SMEP Note Power states availability may vary between the different SKUs 4.0 Power ManagementFigure 11. Processor Power States S0 - Processor Fully powered on full on mode / connected standby modeProcessor Core / Package State Support 4.1 Advanced Configuration and Power Interface ACPI States SupportedSystem States Integrated Memory Controller StatesDirect Media Interface DMI States 4.2 Processor Core Power Management4.2.1 Enhanced Intel SpeedStep Technology Key Features G, S, and C Interface State CombinationsThread 4.2.2 Low-Power Idle StatesFigure 12. Idle Power Management Breakdown of the Processor Cores Core 0 State4.2.3 Requesting Low-Power Idle States Coordination of Thread Power States at the Core LevelFigure 13. Thread and Core C-State Entry and Exit Core C1/C1E State 4.2.4 Core C-State RulesCore C0 State Core C3 StateCore C7 State 4.2.5 Package C-StatesCore C6 State C-State Auto-DemotionCoordination of Core Power States at the Package Level Figure 14. Package C-State Entry and Exit Package C0 StatePackage C1/C1E State Package C6 State Package C2 StatePackage C3 State Package C7 State4.2.6 Package C-States and Display Resolutions Deepest Package C-State Available4.3 Integrated Memory Controller IMC Power Management 4.3.1 Disabling Unused System Memory Outputs4.3.2 DRAM Power Management and Initialization No power-down CKE disable4.3.2.3 Dynamic Power-Down 4.3.2.1 Initialization Role of CKE4.3.2.2 Conditional Self-Refresh 4.3.3 DRAM Running Average Power Limitation RAPL 4.4 PCI Express* Power Management4.5 Direct Media Interface DMI Power Management 4.3.4 DDR Electrical Power Gating EPG4.6.2 Graphics Render C-State 4.6 Graphics Power Management4.6.1 Intel Rapid Memory Power Management Intel RMPM 4.6.3 Intel Graphics Dynamic Frequency5.0 Thermal Management Thermal Management-ProcessorProcessor-Thermal Management Desktop Processor Thermal Specifications5.1 Desktop Processor Thermal Profiles ProfileTTV Power W 5.1.1 Processor PCG 2013D Thermal ProfileTCASE = 0.33 * Power + Case5.1.2 Processor PCG 2013C Thermal Profile 5.1.3 Processor PCG 2013B Thermal Profile 5.1.4 Processor PCG 2013A Thermal Profile Measure TCASE at the geometric center of the package 5.2 Thermal Metrology5.3 Fan Speed Control Scheme with Digital Thermal Sensor DTS 37.5 37.5Figure 20. Digital Thermal Sensor DTS 1.1 Definition Points ΨCA = TCASE-MAX - TAMBIENT-TARGET / TDP5.4 Fan Speed Control Scheme with Digital Thermal Sensor DTS 5.5 Processor Temperature Figure 21. Digital Thermal Sensor DTS Thermal Profile DefinitionThermal Margin Slope 5.6 Adaptive Thermal Monitor Frequency ControlClock Modulation Immediate Transition to Combined TM1 and TM2Critical Temperature Flag PROCHOT# Signal 5.7 THERMTRIP# Signal 5.8 Digital Thermal Sensor5.9.1 Intel Turbo Boost Technology Power Control and Reporting 5.9 Intel Turbo Boost Technology Thermal Considerations5.8.1 Digital Thermal Sensor Accuracy Taccuracy 5.9.2 Package Power Control Intel Turbo Boost Technology 2.0 Package Power Control SettingsFigure 22. Package Power Control 5.9.3 Turbo Time ParameterSignal Description Buffer Types 6.0 Signal Description6.1 System Memory Interface Signals Memory Channel A SignalsMemory Channel B Signals Signal Description-ProcessorDDR3/DDR3L Reference Voltage This signal is used as 6.2 Memory Reference and Compensation SignalsMemory Reference and Compensation Signals System Memory Impedance CompensationCFG3 MSR Privacy Bit Feature 6.3 Reset and Miscellaneous SignalsReset and Miscellaneous Signals CFG65 PCI Express* BifurcationPCI Express* Graphics Interface Signals 6.4 PCI Express*-Based Interface Signals6.5 Display Interface Signals Display Interface SignalsPhase Locked Loop PLL Signals 6.7 Phase Locked Loop PLL Signals6.8 Testability Signals Testability SignalsError and Thermal Protection Signals 6.9 Error and Thermal Protection Signals6.10 Power Sequencing Signals Power Sequencing Signals6.13 Ground and Non-Critical to Function NCTF Signals 6.11 Processor Power Signals6.12 Sense Signals Processor Power Signals7.1 Integrated Voltage Regulator 7.0 Electrical Specifications7.2 Power and Ground Lands 7.3 VCC Voltage Identification VIDTable 45. Voltage Regulator VR 12.5 Voltage Identification Electrical Specifications-ProcessorProcessor-Electrical Specifications continuedcontinued Electrical Specifications-Processor continuedcontinued Processor-Electrical Specifications 7.4 Reserved or Unused Signals 7.5 Signal GroupsSignal Groups Power / Ground / Other DDR3 / DDR3L Data SignalsDDR3 / DDR3L Reference Voltage Signals DDR3 / DDR3L CompensationPCI Express* Graphics 7.6 Test Access Port TAP Connection7.7 DC Specifications Digital Media Interface DMI7.8 Voltage and Current Specifications Electrical Specifications-Processor DDR3 / DDR3L Signal Group DC Specifications VCCIOOUT, VCOMPOUT, and VCCIOTERMDigital Display Interface Group DC Specifications embedded DisplayPort* eDP* Group DC Specifications CMOS Signal Group DC SpecificationsGTL Signal Group and Open Drain Signal Group DC Specifications 7.8.1 Platform Environment Control Interface PECI DC Characteristics PCI Express* DC Specifications7.8.2 Input Device Hysteresis Figure 23. Input Device HysteresisFigure 24. Processor Package Assembly Sketch 8.0 Package Mechanical Specifications8.2 Package Loading Specifications 8.1 Processor Component Keep-Out ZoneProcessor Loading Specifications 8.4 Package Insertion Specifications8.5 Processor Mass Specification 8.3 Package Handling GuidelinesProcessor Materials 8.7 Processor Markings8.8 Processor Land Coordinates Figure 25. Processor Top-Side Markings8.9 Processor Storage Specifications Processor Storage SpecificationsFigure 26. Processor Package Land Coordinates RHsustained storage TIMEsustained storage9.0 Processor Ball and Signal Information Processor Ball List by Signal NameProcessor Ball and Signal Information-Processor Processor-Processor Ball and Signal Information Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name AU20 Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #
Related manuals
Manual 1 pages 13.56 Kb Manual 2 pages 53.21 Kb Manual 1 pages 5.02 Kb

BX80633I74960X, BX80646I34130, BX80646I54430, BX80646I74770K, BX80646I74770 specifications

The Intel CM8063701159502, or BX80637I53470, is a powerful CPU designed for modern computing needs. This processor belongs to Intel's 4th generation of Core i5 processors, commonly known as "Haswell". It showcases Intel's commitment to enhancing performance, increasing energy efficiency, and delivering an enriching user experience.

One of the main features of the Intel Core i5-3470 is its quad-core architecture. This allows the processor to handle multiple threads simultaneously, making it adept at multitasking and running demanding applications efficiently. With a base clock speed of 3.2 GHz, it can boost up to 3.6 GHz using Intel’s Turbo Boost technology, providing additional power when needed for intensive tasks like gaming or video editing.

The Intel i5-3470 features Intel's HD Graphics 2500, which offers decent graphics performance for everyday tasks and casual gaming. This integrated graphics solution is capable of delivering high-definition visuals and supports DirectX 11, making it suitable for lightweight gaming experiences without the need for an additional dedicated graphics card.

Another standout characteristic of the BX80637I53470 is its support for Intel Smart Cache, which is an advanced caching technology. It provides a shared cache pool that enhances performance by reducing the time it takes to access frequently used data. This feature, coupled with Intel's instruction set architecture, allows for improved processing agility and efficiency across applications.

The processor is built on a 22nm manufacturing process, which results in reduced power consumption and heat generation compared to its predecessors. It has a thermal design power (TDP) of 77 watts, making it energy efficient while still delivering robust performance. Additionally, the Core i5-3470 supports DDR3 memory, with speeds up to 1600 MHz, enabling quick data retrieval and improved system responsiveness.

Security is another important aspect of the Intel i5-3470, featuring Intel Secure Key and Intel AES New Instructions (AES-NI), which protect sensitive data and enhance encryption performance.

In conclusion, the Intel CM8063701159502, or BX80637I53470, encapsulates modern computing technology with its powerful quad-core performance, integrated graphics, energy efficiency, and robust security features, making it a versatile choice for a wide range of computing tasks. Whether users are engaging in casual gaming, productivity tasks, or multimedia consumption, this processor demonstrates a solid balance of performance and efficiency, providing an excellent computing experience overall.