Intel BX80646I54570S, CM8064601466200 manual Digital Thermal Sensor DTS 1.1 Definition Points

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ΨCA = (TCASE-MAX – TAMBIENT-TARGET) / TDP
December 2013 Order No.: 328897-004

Processor—Thermal Management

The ΨCA point at DTS = -1 defines the minimum ΨCA required at TDP considering the worst case system design TAMBIENT design point:

ΨCA = (TCASE-MAX TAMBIENT-TARGET) / TDP

For example, for a 95 W TDP part, the Tcase maximum is 72.6 °C and at a worst case design point of 40 °C local ambient this will result in:

ΨCA = (72.6 – 40) / 95 = 0.34 °C/W

Similarly for a system with a design target of 45 °C ambient, the ΨCA at DTS = -1 needed will be 0.29 °C/W.

The second point defines the thermal solution performance (ΨCA) at TCONTROL. The following table lists the required ΨCA for the various TDP processors.

These two points define the operational limits for the processor for DTS 1.1 implementation. At TCONTROL the fan speed must be programmed such that the resulting ΨCA is better than or equivalent to the required ΨCA listed in the following table. Similarly, the fan speed should be set at DTS = -1 such that the thermal solution performance is better than or equivalent to the ΨCA requirements at TAMBIENT- MAX. The fan speed controller must linearly ramp the fan speed from processor DTS = TCONTROL to processor DTS = -1.

Figure 20. Digital Thermal Sensor (DTS) 1.1 Definition Points

Desktop 4th Generation Intel® CoreProcessor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family

Datasheet – Volume 1 of 2 72

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Contents Datasheet - Volume 1 of DecemberDatasheet - Volume 1 of 2 Contents 4.0 Power ManagementRevision History 1.0 Introduction6.0 Signal Description Processor-Contents5.0 Thermal Management 7.0 Electrical Specifications 8.0 Package Mechanical Specifications9.0 Processor Ball and Signal Information 7.8.1 Platform Environment Control Interface PECI DC CharacteristicsFigures Tables Tables-ProcessorProcessor-Tables Revision History Revision History-Processor1.0 Introduction Processor-IntroductionFigure 1. Platform Block Diagram 1.1 Supported TechnologiesProcessor Platform Controller Hub PCH1.3 Power Management Support 1.2 InterfacesProcessor Core System1.4 Thermal Management Support 1.5 Package Support1.6 Terminology Terminologywith Virtual Machine Monitor software, enables multiple, robust independent software Introduction-Processor 1.7 Related Documents Related DocumentsDocument Number / Locationspecifications httpproducts/processor manuals/index.htm2.0 Interfaces 2.1 System Memory InterfaceSupported UDIMM Module Configurations 2.1.1 System Memory Technology SupportedProcessor DIMM Support by Product Supported SO-DIMM Module Configurations AIO Only 2.1.2 System Memory Timing SupportDDR3 / DDR3L System Memory Timing Support 2.1.3 System Memory Organization Modes Single-Channel ModeDual-Channel Mode - Intel Flex Memory Technology Mode Figure 2. Intel Flex Memory Technology Operations2.1.3.2 Intel Fast Memory Access Intel FMA Technology Enhancements Just-in-Time Command SchedulingCommand Overlap 2.1.3.1 System Memory FrequencyTable 7. PCI Express* Supported Configurations in Desktop Products 2.2 PCI Express* Interface2.2.1 PCI Express* Support 2.1.3.3 Data Scrambling2.2.3 PCI Express* Configuration Mechanism 2.2.2 PCI Express* ArchitecturePCI Express* Related Register Structures in the Processor PCI Express* PortPCI Express* Lanes Connection 2.3 Direct Media Interface DMI Figure 4. PCI Express* Typical Operation 16 Lanes Mapping1 X 4 Controller 1 X 8 ControllerDMI Error Flow DMI Link Down2.4 Processor Graphics 2.5 Processor Graphics Controller GTFigure 5. Processor Graphics Controller Unit Block Diagram 2.5.1 3D and Video Engines for Graphics Processing3D Pipeline 3D Engine Execution UnitsVertex Shader VS Stage Geometry Shader GS StageClip Stage Strips and Fans SF Stage2.6 Digital Display Interface DDI 2.5.2 Multi Graphics Controllers Multi-Monitor SupportLogical 128-Bit Fixed BLT and 256 Fill Engine Figure 6. Processor Display Architecture Source Device Sink DeviceDisplayPort Figure 7. DisplayPort* OverviewHDMI Source HDMI SinkFigure 8. HDMI* Overview HDMI TxMultiple Display Configurations embedded DisplayPortIntegrated Audio Table 8. Processor Supported Audio Formats over HDMI*and DisplayPortValid Three Display Configurations through the Processor High-bandwidth Digital Content Protection HDCP2.7 Intel Flexible Display Interface Intel FDI 2.8 Platform Environmental Control Interface PECI2.8.1 PECI Bus Architecture Figure 9. PECI Host-Clients Connection Example PECIHost / Originator PECI Client3.0 Technologies 3.1 Intel Virtualization Technology Intel VTIntel VT-x Objectives ing=VTIntel VT-x Features Intel VT-d Objectives Intel VT-d Features Figure 10. Device to Domain Mapping Structures3.2 Intel Trusted Execution Technology Intel TXT 3.3 Intel Hyper-Threading Technology Intel HT Technology 3.4 Intel Turbo Boost Technology 3.5 Intel Advanced Vector Extensions 2.0 Intel AVX2Intel Turbo Boost Technology 2.0 Frequency 3.6 Intel Advanced Encryption Standard New Instructions Intel AES-NI PCLMULQDQ InstructionIntel Secure Key 3.8 Intel 64 Architecture x2APIC 3.9 Power Aware Interrupt Routing PAIR 3.10 Execute Disable Bit3.11 Supervisor Mode Execution Protection SMEP 4.0 Power Management Figure 11. Processor Power StatesNote Power states availability may vary between the different SKUs S0 - Processor Fully powered on full on mode / connected standby mode4.1 Advanced Configuration and Power Interface ACPI States Supported System StatesProcessor Core / Package State Support Integrated Memory Controller States4.2 Processor Core Power Management 4.2.1 Enhanced Intel SpeedStep Technology Key FeaturesDirect Media Interface DMI States G, S, and C Interface State Combinations4.2.2 Low-Power Idle States Figure 12. Idle Power Management Breakdown of the Processor CoresThread Core 0 State4.2.3 Requesting Low-Power Idle States Coordination of Thread Power States at the Core LevelFigure 13. Thread and Core C-State Entry and Exit 4.2.4 Core C-State Rules Core C0 StateCore C1/C1E State Core C3 State4.2.5 Package C-States Core C6 StateCore C7 State C-State Auto-DemotionCoordination of Core Power States at the Package Level Figure 14. Package C-State Entry and Exit Package C0 StatePackage C1/C1E State Package C2 State Package C3 StatePackage C6 State Package C7 State4.2.6 Package C-States and Display Resolutions Deepest Package C-State Available4.3 Integrated Memory Controller IMC Power Management 4.3.1 Disabling Unused System Memory Outputs4.3.2 DRAM Power Management and Initialization No power-down CKE disable4.3.2.3 Dynamic Power-Down 4.3.2.1 Initialization Role of CKE4.3.2.2 Conditional Self-Refresh 4.4 PCI Express* Power Management 4.5 Direct Media Interface DMI Power Management4.3.3 DRAM Running Average Power Limitation RAPL 4.3.4 DDR Electrical Power Gating EPG4.6 Graphics Power Management 4.6.1 Intel Rapid Memory Power Management Intel RMPM4.6.2 Graphics Render C-State 4.6.3 Intel Graphics Dynamic Frequency5.0 Thermal Management Thermal Management-ProcessorDesktop Processor Thermal Specifications 5.1 Desktop Processor Thermal ProfilesProcessor-Thermal Management Profile5.1.1 Processor PCG 2013D Thermal Profile TCASE = 0.33 * Power +TTV Power W Case5.1.2 Processor PCG 2013C Thermal Profile 5.1.3 Processor PCG 2013B Thermal Profile 5.1.4 Processor PCG 2013A Thermal Profile 5.2 Thermal Metrology 5.3 Fan Speed Control Scheme with Digital Thermal Sensor DTSMeasure TCASE at the geometric center of the package 37.5 37.5Figure 20. Digital Thermal Sensor DTS 1.1 Definition Points ΨCA = TCASE-MAX - TAMBIENT-TARGET / TDP5.4 Fan Speed Control Scheme with Digital Thermal Sensor DTS 5.5 Processor Temperature Figure 21. Digital Thermal Sensor DTS Thermal Profile DefinitionThermal Margin Slope 5.6 Adaptive Thermal Monitor Frequency ControlClock Modulation Immediate Transition to Combined TM1 and TM2Critical Temperature Flag PROCHOT# Signal 5.7 THERMTRIP# Signal 5.8 Digital Thermal Sensor5.9.1 Intel Turbo Boost Technology Power Control and Reporting 5.9 Intel Turbo Boost Technology Thermal Considerations5.8.1 Digital Thermal Sensor Accuracy Taccuracy 5.9.2 Package Power Control Intel Turbo Boost Technology 2.0 Package Power Control SettingsFigure 22. Package Power Control 5.9.3 Turbo Time Parameter6.0 Signal Description 6.1 System Memory Interface SignalsSignal Description Buffer Types Memory Channel A SignalsMemory Channel B Signals Signal Description-Processor6.2 Memory Reference and Compensation Signals Memory Reference and Compensation SignalsDDR3/DDR3L Reference Voltage This signal is used as System Memory Impedance Compensation6.3 Reset and Miscellaneous Signals Reset and Miscellaneous SignalsCFG3 MSR Privacy Bit Feature CFG65 PCI Express* Bifurcation6.4 PCI Express*-Based Interface Signals 6.5 Display Interface SignalsPCI Express* Graphics Interface Signals Display Interface Signals6.7 Phase Locked Loop PLL Signals 6.8 Testability SignalsPhase Locked Loop PLL Signals Testability Signals6.9 Error and Thermal Protection Signals 6.10 Power Sequencing SignalsError and Thermal Protection Signals Power Sequencing Signals6.11 Processor Power Signals 6.12 Sense Signals6.13 Ground and Non-Critical to Function NCTF Signals Processor Power Signals7.0 Electrical Specifications 7.2 Power and Ground Lands7.1 Integrated Voltage Regulator 7.3 VCC Voltage Identification VIDTable 45. Voltage Regulator VR 12.5 Voltage Identification Electrical Specifications-ProcessorProcessor-Electrical Specifications continuedcontinued Electrical Specifications-Processor continuedcontinued Processor-Electrical Specifications 7.4 Reserved or Unused Signals 7.5 Signal GroupsSignal Groups DDR3 / DDR3L Data Signals DDR3 / DDR3L Reference Voltage SignalsPower / Ground / Other DDR3 / DDR3L Compensation7.6 Test Access Port TAP Connection 7.7 DC SpecificationsPCI Express* Graphics Digital Media Interface DMI7.8 Voltage and Current Specifications Electrical Specifications-Processor DDR3 / DDR3L Signal Group DC Specifications VCCIOOUT, VCOMPOUT, and VCCIOTERMDigital Display Interface Group DC Specifications embedded DisplayPort* eDP* Group DC Specifications CMOS Signal Group DC SpecificationsGTL Signal Group and Open Drain Signal Group DC Specifications 7.8.1 Platform Environment Control Interface PECI DC Characteristics PCI Express* DC Specifications7.8.2 Input Device Hysteresis Figure 23. Input Device Hysteresis8.0 Package Mechanical Specifications 8.2 Package Loading SpecificationsFigure 24. Processor Package Assembly Sketch 8.1 Processor Component Keep-Out Zone8.4 Package Insertion Specifications 8.5 Processor Mass SpecificationProcessor Loading Specifications 8.3 Package Handling Guidelines8.7 Processor Markings 8.8 Processor Land CoordinatesProcessor Materials Figure 25. Processor Top-Side Markings8.9 Processor Storage Specifications Processor Storage SpecificationsFigure 26. Processor Package Land Coordinates RHsustained storage TIMEsustained storage9.0 Processor Ball and Signal Information Processor Ball List by Signal NameProcessor Ball and Signal Information-Processor Processor-Processor Ball and Signal Information Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name AU20 Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #Signal Name Signal NameSignal Name Ball #
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BX80633I74960X, BX80646I34130, BX80646I54430, BX80646I74770K, BX80646I74770 specifications

The Intel CM8063701159502, or BX80637I53470, is a powerful CPU designed for modern computing needs. This processor belongs to Intel's 4th generation of Core i5 processors, commonly known as "Haswell". It showcases Intel's commitment to enhancing performance, increasing energy efficiency, and delivering an enriching user experience.

One of the main features of the Intel Core i5-3470 is its quad-core architecture. This allows the processor to handle multiple threads simultaneously, making it adept at multitasking and running demanding applications efficiently. With a base clock speed of 3.2 GHz, it can boost up to 3.6 GHz using Intel’s Turbo Boost technology, providing additional power when needed for intensive tasks like gaming or video editing.

The Intel i5-3470 features Intel's HD Graphics 2500, which offers decent graphics performance for everyday tasks and casual gaming. This integrated graphics solution is capable of delivering high-definition visuals and supports DirectX 11, making it suitable for lightweight gaming experiences without the need for an additional dedicated graphics card.

Another standout characteristic of the BX80637I53470 is its support for Intel Smart Cache, which is an advanced caching technology. It provides a shared cache pool that enhances performance by reducing the time it takes to access frequently used data. This feature, coupled with Intel's instruction set architecture, allows for improved processing agility and efficiency across applications.

The processor is built on a 22nm manufacturing process, which results in reduced power consumption and heat generation compared to its predecessors. It has a thermal design power (TDP) of 77 watts, making it energy efficient while still delivering robust performance. Additionally, the Core i5-3470 supports DDR3 memory, with speeds up to 1600 MHz, enabling quick data retrieval and improved system responsiveness.

Security is another important aspect of the Intel i5-3470, featuring Intel Secure Key and Intel AES New Instructions (AES-NI), which protect sensitive data and enhance encryption performance.

In conclusion, the Intel CM8063701159502, or BX80637I53470, encapsulates modern computing technology with its powerful quad-core performance, integrated graphics, energy efficiency, and robust security features, making it a versatile choice for a wide range of computing tasks. Whether users are engaging in casual gaming, productivity tasks, or multimedia consumption, this processor demonstrates a solid balance of performance and efficiency, providing an excellent computing experience overall.