IBM
EM78P312N
manual
DOC. Version
DC Electrical Characteristics
Functional Block Diagram
RC Timer 4 Data Buffer
Symbol Pin No Type Function
Reset and Wake-up
Power-on Considerations
TEN = 0 Disable TEN = 1 Enable
Mode Switching Control
Transfer Mode
Page 1
EM78P312N
8-B
IT
Microcontroller
Green Product Specification
D
OC
. V
ERSION
1.0
ELAN MICROELECTRONICS CORP.
October 2006
Page 1
Page 2
Image 1
Page 1
Page 2
Contents
DOC. Version
EM78P312N
Elan Microelectronics Corporation
Contents
16.1
14.1
16.2
16.3
Bit Microcontroller
General Description
Pin Description
Symbol Pin No Type Function
Function Description
Functional Block Diagram
Operating Registers
Operating Registers
R1 Time Clock /Counter
Bit Microcontroller R0 Indirect Addressing Register
R2 Program Counter & Stack
R3 Status Register
User Memory Space
Bit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select
RBS1 RBS0
SIS = 0 Idle mode SIS = 1 Sleep mode
Bit 1 SIS Sleep and Idle mode select
Bit 0 C Carry flag R4 RAM Select Register
R5 System Control Register
Bit Microcontroller R6 Port 6 I/O Data Register
RB Timer/Counter 4 Control Register
Bit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register
R7 Port 7 I/O Data Register
Clock Source Resolution Max. Time
RC Timer 4 Data Buffer
TC4CK2 TC4CK1 TC4CK0
Fosc=8M
RFInterrupt Status Flag Register
Bit Microcontroller RE Interrupt Status Flag Register
TC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer a
Bank 1 R5 TC3CR Timer/Counter 3 Control Register
Bank 1 R7 TC3DB Timer 3 Data Buffer B
Bit 7 TC3CAP Software capture control
Bank 1 RA TC2DL Timer 2 Data Buffer Low Byte
Bank 1 R9 TC2DH Timer 2 Data Buffer High Byte
TC2S = 0 Stop and counter clear
Bank 1 RB Adcr AD Control Register
Bit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time Select
Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control
Bank 1 RC Adic AD Input Pin Control
Bank 1 RD Addh AD High 8-bit Data Buffer
Bit Microcontroller Bank 1 RE Tbktc TBT/Keytone Control
TEN = 0 Disable TEN = 1 Enable
Bank 2 R5 URC1 Uart Control Register
Bit
Bit 7 URRD8 Receiving data Bit
Bank 2 R7 URS Uart Status Register
BRATE2 BRATE1 BRATE0
TC2CK1 TC2CK0
Bit 6 Even Select parity check
Bit 5 PRE Enable parity addition
Even = 0 Odd parity Even = 1 Even parity
Bank 2 R9 Urtd Uart Transmit Data Buffer
Bit 2 EDS Data shift out edge select
Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source Select
EDS = 0 Rising edge EDS = 1 Falling edge
Bit 0 WBE Write buffer empty flag. Read only
Transfer Mode
PHE6x = 1 Disable P6x pull high
Bank 3 RB PLC1 Pull Low Control Register
SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0
Special Purpose Registers
Intcr − INT Control Register Address 0Bh
IOC6 ~ IOC9 − I/O Port Control Register
INT1ES = 0 Rising edge INT1ES = 1 Falling edge
TC2ES = 0 Rising edge TC2ES = 1 Falling edge
Adoscr − AD Offset Control Register Address 0Ch
External Interrupt
Cali Sign
Uerrie Urie Utie Tbie EXIE1 TCIE0
IMR2 − Interrupt Mask Register 2 Address 0Fh
Registers for CPU Operation Mode
CPU Operation Mode
Mode Switching Control
Operation Mode
Wake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep Instruction
Sleep Mode Idle Mode
AD Converter
Wake-up Methods
ADC Data Register
Operation Mode Max. Frequency Max. Conversion Rate per Bit
Sampling Time
Conversion Time
Address Name Bit
Time Base Timer and Keytone Generator
MUX
Registers for Uart Circuit
Uart Universal Asynchronous Receiver/Transmitter
Name Bit
Transmitting
Uart Mode
Baud Rate Generator
Receiving
Registers for the SPI Circuit
SPI Serial Peripheral Interface
Rbank Address Name Bit
Transfer Mode
Shift Direction and Sample Phase
Bit Transmit Mode
Serial Clock
Bit Transmit/Receive Mode
Bit Microcontroller Bit Receive Mode
SCK pin
Multiple Device Connect /SS
Spis
Registers for Timer/Counter 2 Circuit
Timer/Counter
Counter Mode
Timer Mode
Window Mode
21 Window Mode Timing Chart
Registers for Timer/Counter 3 Circuit
22 Configuration of Timer/Counter3
Capture Mode
TCIF4
Registers for Timer 4 Circuit
TCR4
PDO Mode
12 TCC/WDT & Prescaler
PWM Mode
Up-counter
TC4 Interrupt
Reset
Reset and Wake-up
13 I/O Ports
Wake-up from Idle Mode
Wake-up from Sleep Mode
Summary of the Initialized Values for Registers
Address Name Reset Type Bit
SCR
Bit Microcontroller Register Bank
Addres
URTD8
Status of RST, T, and P of the Status Register
Reset Type
Bit Microcontroller General Purpose Registers
Events that may affect the T and P Status
Interrupt
28 Controller Reset Block Diagram
Oscillator Modes
Oscillator
Crystal Oscillator/Ceramic Resonators Crystal
Summary of Maximum Operating Speeds
740 EM78P312N 809N
Oscillator Type Frequency Mode Frequency C1 pF C2 pF
OS CI
External RC Oscillator Mode
Code Option Register
Enwdtb = 0 Enable Enwdtb = 1 Disable
Code Option Register Word
Bit 12 ~ 9 Not used
External Power-on Reset Circuit
Power-on Considerations
Customer ID Register
OSC = 0 RC type OSC = 1 Crystal type
Vdd
Residue-Voltage Protection
EM78P312N
EM78P809N
Binary Instruction Hex Mnemonic Operation Status
Instruction Set
DEC
Binary Instruction Hex Mnemonic Operation Status Affected
Absolute Maximum Ratings
Symbol Parameter Condition Min Typ Max Unit
Recommended Operating Conditions
Vss =
Ta= 25 C, VDD= 5.0V ± 5%, VSS=
DC Electrical Characteristics
Ta= 25 C, VDD= 3.0V ± 5%, VSS=
Varef
Symbol Parameter Conditions Min Typ Max Unit
AC Electrical Characteristic
Ta=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V
AC Test Input/Output Waveform
Timing Diagram
Package Type
OTP MCU
Pin Count Package Size
EM78P311SxY
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