IBM EM78P312N manual DC Electrical Characteristics, Ta= 25 C, VDD= 5.0V ± 5%, VSS=

Page 63

EM78P312N

8-Bit Microcontroller

7 Electrical Characteristics

7.1 DC Electrical Characteristics

Ta= 25 °C, VDD= 5.0V ± 5%, VSS= 0V

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

Fc

Crystal: 4.5V to VDD

Two cycles with two clocks

1

−

10

MHz

ERC

ERC: VDD = 5V

R: 5.1KΩ, C: 100 pF

630

900

1170

kHz

VIHRC

Input High Threshold Voltage

OSCI in RC mode

2.8

4

4.5

V

(Schmitt Trigger )

IRC1

Sink current

VI from low to high , VI=5V

15.5

22

28.5

mA

VILRC

Input Low Threshold Voltage

OSCI in RC mode

1.3

1.8

2.7

V

(Schmitt Trigger )

IRC2

Sink current

VI from high to low , VI=2V

12

17

22

mA

IIL

Input Leakage Current for input

VIN = VDD, VSS

-1

0

1

μA

pins

VIH1

Input High Voltage

Ports 6, 7, 8, 9

0.7VDD

−

VDD +0.3V

V

(Schmitt Trigger)

VIL1

Input Low Voltage

Ports 6, 7, 8, 9,

-0.3V

−

0.3 VDD

V

(Schmitt Trigger)

VIHT1

Input High Threshold Voltage

/RESET, TCC, INT

0.7 VDD

−

VDD +0.3V

V

(Schmitt Trigger)

VILT1

Input Low Threshold Voltage

/RESET, TCC, INT

-0.3V

−

0.3 VDD

V

(Schmitt Trigger)

VIHX1

Clock Input High Voltage

OSCI in crystal mode

0.7VDD

−

VDD+0.3V

V

VILX1

Clock Input Low Voltage

OSCI in crystal mode

-0.3V

−

0.3VDD

V

IOH1

Output High Voltage

VOH = VDD-0.4V

-3.5

-5

-6.5

mA

(Ports 6, 7, 8, 9)

IOL1

Output Low Voltage

VOL = VSS+0.4V

3

5

7

mA

(Port 9)

IOL2

Output Low Voltage

VOL = VSS+0.4V

12

15

20

mA

(Ports 6, Port 7, Port 8)

IPH

Pull-high current

Pull-high active, input pin at VSS

-50

-75

-100

μA

IPL

Pull-Low current

Pull-high active, input pin at VDD

50

75

100

μA

ISB1

Sleep mode

All input and I/O

WDT

−

0.8

1.5

μA

Power down current

pins at VDD,

disabled

Sleep mode

WDT

ISB2

output pin floating

−

6

10

μA

Power down current

enabled

Idle mode

ICC3

Operating supply current

VDD=5V, /RESET= 'High',

−

1.1

1.5

mA

at two clocks

Fc=8MHz, CLKS="0", output pin

Normal mode

floating, WDT enabled

ICC4

Operating supply current

−

3.0

3.5

mA

at two clocks

Note: * Data in the Minimum, Typical, Maximum (“Min”, “Typ”, ”Max”) columns are based on characterization results at 25°C.

Product Specification (V1.0) 10.03.2006

• 59

(This specification is subject to change without further notice)

Image 63

Contents DOC. Version EM78P312NElan Microelectronics Corporation Contents 16.3 14.116.1 16.2Bit Microcontroller General DescriptionPin Description Symbol Pin No Type FunctionFunction Description Functional Block DiagramOperating Registers Operating RegistersBit Microcontroller R0 Indirect Addressing Register R1 Time Clock /CounterR2 Program Counter & Stack RBS1 RBS0 User Memory SpaceR3 Status Register Bit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page selectR5 System Control Register Bit 1 SIS Sleep and Idle mode selectSIS = 0 Idle mode SIS = 1 Sleep mode Bit 0 C Carry flag R4 RAM Select RegisterR7 Port 7 I/O Data Register RB Timer/Counter 4 Control RegisterBit Microcontroller R6 Port 6 I/O Data Register Bit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data registerFosc=8M RC Timer 4 Data BufferClock Source Resolution Max. Time TC4CK2 TC4CK1 TC4CK0RFInterrupt Status Flag Register Bit Microcontroller RE Interrupt Status Flag RegisterBit 7 TC3CAP Software capture control Bank 1 R5 TC3CR Timer/Counter 3 Control RegisterTC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer a Bank 1 R7 TC3DB Timer 3 Data Buffer BBank 1 RB Adcr AD Control Register Bank 1 R9 TC2DH Timer 2 Data Buffer High ByteBank 1 RA TC2DL Timer 2 Data Buffer Low Byte TC2S = 0 Stop and counter clearBank 1 RD Addh AD High 8-bit Data Buffer Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlBit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time Select Bank 1 RC Adic AD Input Pin ControlBit TEN = 0 Disable TEN = 1 EnableBit Microcontroller Bank 1 RE Tbktc TBT/Keytone Control Bank 2 R5 URC1 Uart Control RegisterTC2CK1 TC2CK0 Bank 2 R7 URS Uart Status RegisterBit 7 URRD8 Receiving data Bit BRATE2 BRATE1 BRATE0Bank 2 R9 Urtd Uart Transmit Data Buffer Bit 5 PRE Enable parity additionBit 6 Even Select parity check Even = 0 Odd parity Even = 1 Even parityBit 0 WBE Write buffer empty flag. Read only Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source SelectBit 2 EDS Data shift out edge select EDS = 0 Rising edge EDS = 1 Falling edgeSPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 PHE6x = 1 Disable P6x pull highTransfer Mode Bank 3 RB PLC1 Pull Low Control RegisterSpecial Purpose Registers TC2ES = 0 Rising edge TC2ES = 1 Falling edge IOC6 ~ IOC9 − I/O Port Control RegisterIntcr − INT Control Register Address 0Bh INT1ES = 0 Rising edge INT1ES = 1 Falling edgeExternal Interrupt Adoscr − AD Offset Control Register Address 0ChCali Sign Uerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhOperation Mode CPU Operation ModeRegisters for CPU Operation Mode Mode Switching ControlWake-up Methods Sleep Mode Idle ModeWake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep Instruction AD ConverterConversion Time Operation Mode Max. Frequency Max. Conversion Rate per BitADC Data Register Sampling TimeAddress Name Bit Time Base Timer and Keytone GeneratorMUX Uart Universal Asynchronous Receiver/Transmitter Registers for Uart CircuitName Bit Transmitting Uart ModeBaud Rate Generator ReceivingSPI Serial Peripheral Interface Registers for the SPI CircuitRbank Address Name Bit Serial Clock Shift Direction and Sample PhaseTransfer Mode Bit Transmit ModeBit Microcontroller Bit Receive Mode Bit Transmit/Receive ModeSCK pin Multiple Device Connect /SS SpisRegisters for Timer/Counter 2 Circuit Timer/CounterTimer Mode Counter ModeWindow Mode 21 Window Mode Timing Chart Registers for Timer/Counter 3 Circuit22 Configuration of Timer/Counter3 Capture ModeTCIF4 Registers for Timer 4 CircuitTCR4 PDO ModeTC4 Interrupt PWM Mode12 TCC/WDT & Prescaler Up-counterReset and Wake-up Reset13 I/O Ports Wake-up from Idle Mode Wake-up from Sleep ModeSummary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankAddres URTD8 Events that may affect the T and P Status Reset TypeStatus of RST, T, and P of the Status Register Bit Microcontroller General Purpose RegistersInterrupt 28 Controller Reset Block DiagramSummary of Maximum Operating Speeds OscillatorOscillator Modes Crystal Oscillator/Ceramic Resonators Crystal740 EM78P312N 809N Oscillator Type Frequency Mode Frequency C1 pF C2 pFOS CI External RC Oscillator ModeBit 12 ~ 9 Not used Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Code Option Register WordOSC = 0 RC type OSC = 1 Crystal type Power-on ConsiderationsExternal Power-on Reset Circuit Customer ID RegisterEM78P809N Residue-Voltage ProtectionVdd EM78P312NBinary Instruction Hex Mnemonic Operation Status Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedVss = Symbol Parameter Condition Min Typ Max UnitAbsolute Maximum Ratings Recommended Operating ConditionsTa= 25 C, VDD= 5.0V ± 5%, VSS= DC Electrical CharacteristicsTa= 25 C, VDD= 3.0V ± 5%, VSS= Varef AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V AC Test Input/Output Waveform Timing DiagramEM78P311SxY OTP MCUPackage Type Pin Count Package Size