IBM EM78P312N manual Bit Microcontroller Register Bank, Scr

Page 49

EM78P312N

8-Bit Microcontroller

Register Bank 0

Address

Name

Reset Type

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

 

 

Bit Name

X

X

X

PS0

X

X

SIS

REM

0x05

SCR

Power-on

U

0

0

0

U

U

0

0

/RESET and WDT time out

U

0

0

0

U

U

0

0

 

 

 

 

Wake-up from Sleep, Idle mode

U

P

P

P

U

U

P

P

 

 

Bit Name

P67

P66

P65

P64

P63

P62

P61

P60

0x06

Port 6

Power-on

1

1

1

1

1

1

1

1

/RESET and WDT time out

1

1

1

1

1

1

1

1

 

 

 

 

Wake-up from Sleep, Idle mode

P

P

P

P

P

P

P

P

 

 

Bit Name

X

X

X

X

P73

P72

P71

P70

0x07

Port 7

Power-on

U

U

U

U

1

1

1

1

/RESET and WDT time out

U

U

U

U

1

1

1

1

 

 

 

 

Wake-up from Sleep, Idle mode

U

U

U

U

P

P

P

P

 

 

Bit Name

X

X

X

X

X

X

P81

P80

0x08

Port 8

Power-on

U

U

U

U

U

U

1

1

/RESET and WDT time out

U

U

U

U

U

U

1

1

 

 

 

 

Wake-up from Sleep, Idle mode

U

U

U

U

U

U

P

P

 

 

Bit Name

P97

P96

P95

P94

P93

P92

P91

P90

0x09

Port 9

Power-on

1

1

1

1

1

1

1

1

/RESET and WDT time out

1

1

1

1

1

1

1

1

 

 

 

 

Wake-Up from Sleep, Idle mode

P

P

P

P

P

P

P

P

 

 

Bit Name

TC4FF1

TC4FF0

TC4S

TC4CK2

TC4CK1

TC4CK0

TC4M1

TC4M0

0x0B

TC4CR

Power-on

0

0

0

0

0

0

0

0

/RESET and WDT time out

0

0

0

0

0

0

0

0

 

 

 

 

Wake-up from Sleep, Idle mode

P

P

P

P

P

P

P

P

 

 

Bit Name

TC4D7

TC4D6

TC4D5

TC4D4

TC4D3

TC4D2

TC4D1

TC4D0

0x0C

TC4D

Power-on

0

0

0

0

0

0

0

0

/RESET and WDT time out

0

0

0

0

0

0

0

0

 

 

 

 

Wake-up from Sleep, Idle mode

P

P

P

P

P

P

P

P

 

 

Bit Name

X

X

INT3F

INT3R

X

X

WDTIF

EXIF0

0X0D

ISFR0

Power-on

U

U

0

0

U

U

0

0

/RESET and WDT time out

U

U

0

0

U

U

0

0

 

 

 

 

Wake-up from Sleep, Idle mode

U

U

P

P

U

U

P

P

 

 

Bit Name

EXIF5

TCIF2

ADIF

X

EXIF3

TCIF4

SPIF

TCIF3

0X0E

ISFR1

Power-on

0

0

0

U

0

0

0

0

/RESET and WDT time out

0

0

0

U

0

0

0

0

 

 

 

 

Wake-up from Sleep, Idle mode

U

P

P

U

P

P

P

P

 

 

Bit Name

X

UERRIF

RBFF

TBEF

TBIF

EXIF1

X

TCIF0

0X0F

ISFR2

Power-on

U

0

0

0

0

0

U

0

/RESET and WDT time out

U

0

0

0

0

0

U

0

 

 

 

 

Wake-up from Sleep, Idle mode

U

P

P

P

P

P

U

P

Product Specification (V1.0) 10.03.2006

45

(This specification is subject to change without further notice)

Image 49
Contents DOC. Version EM78P312NElan Microelectronics Corporation Contents 16.1 14.116.2 16.3Bit Microcontroller General DescriptionPin Description Symbol Pin No Type FunctionFunction Description Functional Block DiagramOperating Registers Operating RegistersR1 Time Clock /Counter Bit Microcontroller R0 Indirect Addressing RegisterR2 Program Counter & Stack R3 Status Register User Memory SpaceBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0SIS = 0 Idle mode SIS = 1 Sleep mode Bit 1 SIS Sleep and Idle mode selectBit 0 C Carry flag R4 RAM Select Register R5 System Control RegisterBit Microcontroller R6 Port 6 I/O Data Register RB Timer/Counter 4 Control RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data RegisterClock Source Resolution Max. Time RC Timer 4 Data BufferTC4CK2 TC4CK1 TC4CK0 Fosc=8MRFInterrupt Status Flag Register Bit Microcontroller RE Interrupt Status Flag RegisterTC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer a Bank 1 R5 TC3CR Timer/Counter 3 Control RegisterBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture controlBank 1 RA TC2DL Timer 2 Data Buffer Low Byte Bank 1 R9 TC2DH Timer 2 Data Buffer High ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control RegisterBit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time Select Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data BufferBit Microcontroller Bank 1 RE Tbktc TBT/Keytone Control TEN = 0 Disable TEN = 1 EnableBank 2 R5 URC1 Uart Control Register BitBit 7 URRD8 Receiving data Bit Bank 2 R7 URS Uart Status RegisterBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0Bit 6 Even Select parity check Bit 5 PRE Enable parity additionEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data BufferBit 2 EDS Data shift out edge select Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source SelectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read onlyTransfer Mode PHE6x = 1 Disable P6x pull highBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0Special Purpose Registers Intcr − INT Control Register Address 0Bh IOC6 ~ IOC9 − I/O Port Control RegisterINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edgeAdoscr − AD Offset Control Register Address 0Ch External InterruptCali Sign Uerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRegisters for CPU Operation Mode CPU Operation ModeMode Switching Control Operation ModeWake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep Instruction Sleep Mode Idle ModeAD Converter Wake-up MethodsADC Data Register Operation Mode Max. Frequency Max. Conversion Rate per BitSampling Time Conversion TimeAddress Name Bit Time Base Timer and Keytone GeneratorMUX Registers for Uart Circuit Uart Universal Asynchronous Receiver/TransmitterName Bit Transmitting Uart ModeBaud Rate Generator ReceivingRegisters for the SPI Circuit SPI Serial Peripheral InterfaceRbank Address Name Bit Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial ClockBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeSCK pin Multiple Device Connect /SS SpisRegisters for Timer/Counter 2 Circuit Timer/CounterCounter Mode Timer ModeWindow Mode 21 Window Mode Timing Chart Registers for Timer/Counter 3 Circuit22 Configuration of Timer/Counter3 Capture ModeTCIF4 Registers for Timer 4 CircuitTCR4 PDO Mode12 TCC/WDT & Prescaler PWM ModeUp-counter TC4 InterruptReset Reset and Wake-up13 I/O Ports Wake-up from Idle Mode Wake-up from Sleep ModeSummary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankAddres URTD8 Status of RST, T, and P of the Status Register Reset TypeBit Microcontroller General Purpose Registers Events that may affect the T and P StatusInterrupt 28 Controller Reset Block DiagramOscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds740 EM78P312N 809N Oscillator Type Frequency Mode Frequency C1 pF C2 pFOS CI External RC Oscillator ModeCode Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word Bit 12 ~ 9 Not usedExternal Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register OSC = 0 RC type OSC = 1 Crystal typeVdd Residue-Voltage ProtectionEM78P312N EM78P809NBinary Instruction Hex Mnemonic Operation Status Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedAbsolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss =Ta= 25 C, VDD= 5.0V ± 5%, VSS= DC Electrical CharacteristicsTa= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V AC Test Input/Output Waveform Timing DiagramPackage Type OTP MCUPin Count Package Size EM78P311SxY