IBM EM78P312N manual Status of RST, T, and P of the Status Register, Reset Type, Event

Page 52

EM78P312N

8-Bit Microcontroller

General Purpose Registers

Address

 

Name

 

Reset Type

 

Bit 7

 

Bit 6

 

Bit 5

 

Bit 4

 

Bit 3

 

Bit 2

 

 

Bit 1

 

Bit 0

0x10

 

R10

 

Bit Name

 

-

 

-

 

-

 

-

 

-

 

-

 

 

-

 

-

 

Power-on

 

U

 

U

 

U

 

U

 

U

 

U

 

 

U

 

U

~

 

~

 

 

 

 

 

 

 

 

 

 

 

 

/RESET and WDT time out

 

P

 

P

 

P

 

P

 

P

 

P

 

 

P

 

P

0x3F

 

R3F

 

 

 

 

 

 

 

 

 

 

 

 

Wake-up from Sleep, Idle mode

 

P

 

P

 

P

 

P

 

P

 

P

 

 

P

 

P

 

 

 

 

Legend: “⋅” = not used

 

 

 

 

“P” = previous value before reset

 

 

 

 

 

 

 

“u” = unknown or don’t care

 

 

“t” = check Table 7

 

 

 

 

 

 

 

5.14.4 The Status of RST, T, and P of the Status Register

The values of T and P are used to verify the event that triggered the processor to wake up. Table 7 shows the events that may affect the status of T and P.

Table 7. The Values of RST, T and P after a reset

 

Reset Type

 

 

 

T

 

P

 

 

 

 

 

 

 

 

 

 

Power on

 

 

1

 

1

 

 

 

 

 

 

 

 

 

 

 

/RESET during Operation mode

 

 

*P

 

*P

 

 

 

 

 

 

 

 

 

 

/RESET wake-up during Sleep mode

 

 

*P

 

*P

 

 

 

 

 

 

 

 

 

 

/RESET wake-up during Idle mode

 

 

*P

 

*P

 

 

 

 

 

 

 

 

 

 

WDT during Operation mode

 

0

 

*P

 

 

 

 

 

 

 

 

 

 

WDT wake-up during Sleep mode

 

0

 

*P

 

 

 

 

 

 

 

 

 

 

WDT wake-up during Idle mode

 

0

 

*P

 

 

 

 

 

 

 

 

 

*P: Previous status before reset

 

 

 

 

 

Table 8 The Events that may affect the T and P Status

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Event

 

 

 

T

 

P

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power on

 

 

1

 

1

 

 

 

 

 

 

 

 

 

 

WDTC instruction

 

 

1

 

1

 

 

 

 

 

 

 

 

 

WDT time-out

 

 

0

 

*P

 

 

 

 

 

 

 

 

 

SLEP instruction

 

 

1

 

0

 

 

 

 

 

 

 

 

 

Wake-Up during Sleep mode

 

 

*P

 

*P

 

 

 

 

 

 

 

*P: Previous value before reset

 

 

 

 

 

48 •

Product Specification (V1.0) 10.03.2006

(This specification is subject to change without further notice)

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Contents EM78P312N DOC. VersionElan Microelectronics Corporation Contents 14.1 16.116.2 16.3General Description Bit MicrocontrollerSymbol Pin No Type Function Pin DescriptionFunctional Block Diagram Function DescriptionOperating Registers Operating RegistersR1 Time Clock /Counter Bit Microcontroller R0 Indirect Addressing RegisterR2 Program Counter & Stack User Memory Space R3 Status RegisterBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0Bit 1 SIS Sleep and Idle mode select SIS = 0 Idle mode SIS = 1 Sleep modeBit 0 C Carry flag R4 RAM Select Register R5 System Control RegisterRB Timer/Counter 4 Control Register Bit Microcontroller R6 Port 6 I/O Data RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data RegisterRC Timer 4 Data Buffer Clock Source Resolution Max. TimeTC4CK2 TC4CK1 TC4CK0 Fosc=8MBit Microcontroller RE Interrupt Status Flag Register RFInterrupt Status Flag RegisterBank 1 R5 TC3CR Timer/Counter 3 Control Register TC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer aBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture controlBank 1 R9 TC2DH Timer 2 Data Buffer High Byte Bank 1 RA TC2DL Timer 2 Data Buffer Low ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control RegisterBit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time SelectBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data BufferTEN = 0 Disable TEN = 1 Enable Bit Microcontroller Bank 1 RE Tbktc TBT/Keytone ControlBank 2 R5 URC1 Uart Control Register BitBank 2 R7 URS Uart Status Register Bit 7 URRD8 Receiving data BitBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0Bit 5 PRE Enable parity addition Bit 6 Even Select parity checkEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data BufferBit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source Select Bit 2 EDS Data shift out edge selectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read onlyPHE6x = 1 Disable P6x pull high Transfer ModeBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0Special Purpose Registers IOC6 ~ IOC9 − I/O Port Control Register Intcr − INT Control Register Address 0BhINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edgeAdoscr − AD Offset Control Register Address 0Ch External InterruptCali Sign IMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0CPU Operation Mode Registers for CPU Operation ModeMode Switching Control Operation ModeSleep Mode Idle Mode Wake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep InstructionAD Converter Wake-up MethodsOperation Mode Max. Frequency Max. Conversion Rate per Bit ADC Data RegisterSampling Time Conversion TimeTime Base Timer and Keytone Generator Address Name BitMUX Registers for Uart Circuit Uart Universal Asynchronous Receiver/TransmitterName Bit Uart Mode TransmittingReceiving Baud Rate GeneratorRegisters for the SPI Circuit SPI Serial Peripheral InterfaceRbank Address Name Bit Shift Direction and Sample Phase Transfer ModeBit Transmit Mode Serial ClockBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeSCK pin Spis Multiple Device Connect /SSTimer/Counter Registers for Timer/Counter 2 CircuitCounter Mode Timer ModeWindow Mode Registers for Timer/Counter 3 Circuit 21 Window Mode Timing ChartCapture Mode 22 Configuration of Timer/Counter3Registers for Timer 4 Circuit TCIF4PDO Mode TCR4PWM Mode 12 TCC/WDT & PrescalerUp-counter TC4 InterruptReset Reset and Wake-up13 I/O Ports Wake-up from Sleep Mode Wake-up from Idle ModeAddress Name Reset Type Bit Summary of the Initialized Values for RegistersBit Microcontroller Register Bank SCRAddres URTD8 Reset Type Status of RST, T, and P of the Status RegisterBit Microcontroller General Purpose Registers Events that may affect the T and P Status28 Controller Reset Block Diagram InterruptOscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating SpeedsOscillator Type Frequency Mode Frequency C1 pF C2 pF 740 EM78P312N 809NExternal RC Oscillator Mode OS CIEnwdtb = 0 Enable Enwdtb = 1 Disable Code Option RegisterCode Option Register Word Bit 12 ~ 9 Not usedPower-on Considerations External Power-on Reset CircuitCustomer ID Register OSC = 0 RC type OSC = 1 Crystal typeResidue-Voltage Protection VddEM78P312N EM78P809NInstruction Set Binary Instruction Hex Mnemonic Operation StatusBinary Instruction Hex Mnemonic Operation Status Affected DECSymbol Parameter Condition Min Typ Max Unit Absolute Maximum RatingsRecommended Operating Conditions Vss =DC Electrical Characteristics Ta= 25 C, VDD= 5.0V ± 5%, VSS=Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V Timing Diagram AC Test Input/Output WaveformOTP MCU Package TypePin Count Package Size EM78P311SxY
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