IBM EM78P312N manual Registers for Timer/Counter 3 Circuit, Window Mode Timing Chart

Page 41

EM78P312N

8-Bit Microcontroller

TC2 pin

 

 

 

 

 

 

 

 

 

 

 

Internal clock

 

 

 

 

 

 

 

 

 

 

 

Up-counter

0

1

2

n-3

n-2

n-1

n

0

1

2

3

TCR2

n

 

 

 

 

match

 

 

counter

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

clear

 

 

TC2 interrupt

 

 

 

 

 

 

 

 

 

 

 

Fig. 5-21 Window Mode Timing Chart

5.10 Timer/Counter 3

Registers for Timer/Counter 3 Circuit

R_BANK

 

Address

Name

 

Bit 7

Bit 6

 

Bit 5

 

Bit 4

 

Bit 3

 

Bit 2

 

Bit 1

 

Bit 0

Bank 1

0X05

TC3CR

 

TC3CAP

TC3S

 

TC3CK1

 

TC3CK0

TC3M

 

0

 

0

 

0

 

 

R/W

 

R/W

 

R/W

R/W

 

--

 

--

 

--

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bank 1

0X06

TC3DA

 

TC3DA7

TC3DA6

 

TC3DA5

 

TC3DA4

TC3DA3

 

TC3DA2

 

TC3DA1

TC3DA0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

R/W

 

R/W

 

R/W

R/W

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bank 1

0X07

TC3DB

 

TC3DB7

TC3DB6

 

TC3DB5

 

TC3DB4

TC3DB3

 

TC3DB2

 

TC3DB1

TC3DB0

 

 

R/W

 

R/W

 

R/W

R/W

 

R/W

 

R/W

R/W

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bank 0

0x0E

ISFR1

 

EXIF5

TCIF2

 

ADIF

 

0

 

EXIF3

 

TCIF4

 

SPIF

TCIF3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

--

 

R/W

 

R/W

 

R/W

R/W

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SFR

0x0B

INTCR

 

INT1NR

INT0EN

 

0

 

INT3ES1

INT3ES0

 

0

 

INT1ES

TC2ES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

--

 

R/W

R/W

 

--

 

R/W

R/W

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SFR

0x0E

IMR1

 

EXIE5

TCIE2

 

ADIE

 

0

 

EXIE3

 

TCIE4

 

SPIE

TCIE3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

--

 

R/W

 

R/W

 

R/W

R/W

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Product Specification (V1.0) 10.03.2006

37

(This specification is subject to change without further notice)

Image 41
Contents DOC. Version EM78P312NElan Microelectronics Corporation Contents 16.1 14.116.2 16.3Bit Microcontroller General DescriptionPin Description Symbol Pin No Type FunctionFunction Description Functional Block DiagramOperating Registers Operating RegistersR2 Program Counter & Stack Bit Microcontroller R0 Indirect Addressing RegisterR1 Time Clock /Counter R3 Status Register User Memory SpaceBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0SIS = 0 Idle mode SIS = 1 Sleep mode Bit 1 SIS Sleep and Idle mode selectBit 0 C Carry flag R4 RAM Select Register R5 System Control RegisterBit Microcontroller R6 Port 6 I/O Data Register RB Timer/Counter 4 Control RegisterBit 7 ~ Bit 0 P67 ~ P60 8-bit Port 6 I/O data register R7 Port 7 I/O Data RegisterClock Source Resolution Max. Time RC Timer 4 Data BufferTC4CK2 TC4CK1 TC4CK0 Fosc=8MRFInterrupt Status Flag Register Bit Microcontroller RE Interrupt Status Flag RegisterTC3M = 1 Capture mode Bank 1 R6 TC3DA Timer 3 Data Buffer a Bank 1 R5 TC3CR Timer/Counter 3 Control RegisterBank 1 R7 TC3DB Timer 3 Data Buffer B Bit 7 TC3CAP Software capture controlBank 1 RA TC2DL Timer 2 Data Buffer Low Byte Bank 1 R9 TC2DH Timer 2 Data Buffer High ByteTC2S = 0 Stop and counter clear Bank 1 RB Adcr AD Control RegisterBit 5~ Bit 4 ADCK1 ~ ADCK0 AD Conversion Time Select Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlBank 1 RC Adic AD Input Pin Control Bank 1 RD Addh AD High 8-bit Data BufferBit Microcontroller Bank 1 RE Tbktc TBT/Keytone Control TEN = 0 Disable TEN = 1 EnableBank 2 R5 URC1 Uart Control Register BitBit 7 URRD8 Receiving data Bit Bank 2 R7 URS Uart Status RegisterBRATE2 BRATE1 BRATE0 TC2CK1 TC2CK0Bit 6 Even Select parity check Bit 5 PRE Enable parity additionEven = 0 Odd parity Even = 1 Even parity Bank 2 R9 Urtd Uart Transmit Data BufferBit 2 EDS Data shift out edge select Bit 5 ~ Bit 3 BRS0 ~ BRS2 SPI Clock Source SelectEDS = 0 Rising edge EDS = 1 Falling edge Bit 0 WBE Write buffer empty flag. Read onlyTransfer Mode PHE6x = 1 Disable P6x pull highBank 3 RB PLC1 Pull Low Control Register SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0Special Purpose Registers Intcr − INT Control Register Address 0Bh IOC6 ~ IOC9 − I/O Port Control RegisterINT1ES = 0 Rising edge INT1ES = 1 Falling edge TC2ES = 0 Rising edge TC2ES = 1 Falling edgeCali Sign External InterruptAdoscr − AD Offset Control Register Address 0Ch Uerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRegisters for CPU Operation Mode CPU Operation ModeMode Switching Control Operation ModeWake-up Signal R5 SIS = 1+SLEP R5 SIS= 0 + Slep Instruction Sleep Mode Idle ModeAD Converter Wake-up MethodsADC Data Register Operation Mode Max. Frequency Max. Conversion Rate per BitSampling Time Conversion TimeAddress Name Bit Time Base Timer and Keytone GeneratorMUX Name Bit Uart Universal Asynchronous Receiver/TransmitterRegisters for Uart Circuit Transmitting Uart ModeBaud Rate Generator ReceivingRbank Address Name Bit SPI Serial Peripheral InterfaceRegisters for the SPI Circuit Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial ClockSCK pin Bit Microcontroller Bit Receive ModeBit Transmit/Receive Mode Multiple Device Connect /SS SpisRegisters for Timer/Counter 2 Circuit Timer/CounterWindow Mode Timer ModeCounter Mode 21 Window Mode Timing Chart Registers for Timer/Counter 3 Circuit22 Configuration of Timer/Counter3 Capture ModeTCIF4 Registers for Timer 4 CircuitTCR4 PDO Mode12 TCC/WDT & Prescaler PWM ModeUp-counter TC4 Interrupt13 I/O Ports Reset and Wake-upReset Wake-up from Idle Mode Wake-up from Sleep ModeSummary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankAddres URTD8 Status of RST, T, and P of the Status Register Reset TypeBit Microcontroller General Purpose Registers Events that may affect the T and P StatusInterrupt 28 Controller Reset Block DiagramOscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds740 EM78P312N 809N Oscillator Type Frequency Mode Frequency C1 pF C2 pFOS CI External RC Oscillator ModeCode Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word Bit 12 ~ 9 Not usedExternal Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register OSC = 0 RC type OSC = 1 Crystal typeVdd Residue-Voltage ProtectionEM78P312N EM78P809NBinary Instruction Hex Mnemonic Operation Status Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedAbsolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss =Ta= 25 C, VDD= 5.0V ± 5%, VSS= DC Electrical CharacteristicsTa= 25 C, VDD= 3.0V ± 5%, VSS= Varef Ta=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V AC Electrical CharacteristicSymbol Parameter Conditions Min Typ Max Unit AC Test Input/Output Waveform Timing DiagramPackage Type OTP MCUPin Count Package Size EM78P311SxY