Quatech SSCLP-200 Clock Rate and Optional Registers, Enable Scratchpad Register SPAD, J2

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2.4 Clock Rate and Optional Registers

Figure 3 shows the jumper configuration as shipped from the factory, with two spare jumpers applied in neutral positions. Remove one or both and apply as shown in following subsections to set optional features.

SPAD

J2 J3

J4

J5

X8

X4

X2

Figure 3 --- Factory default clock rate and options settings

2.4.1 Enable Scratchpad Register (SPAD, J2)

In the default configuration (see page 11), an Interrupt Status Register and an Options Register replace the scratchpad (base address + 7) of each UART. If the SPAD jumper is applied as in Figure 4, the UART scratchpad registers are enabled, and the Interrupt Status Register and the Options Register are not available.

SPAD

J2 J3

X8

 

J4

X4

 

J5

X2

Figure 4 --- Enable scratchpad registers

2.4.2 Force High-Speed UART Clock (X2, X4, or X8; J3, 4, 5)

These jumpers force an increase of the UART input clock frequency by a factor of two, four, or eight. This feature can allow legacy software to use baud rates above 115,200 bits per second. It is also useful if the serial port device driver does not directly support setting the higher baud rates through the Options Register (see section 4.5).

If one of these jumpers is applied, it overrides any value written to the Options Register to set the clock multiplier by software. The effective baud rate will be either two, four, or eight times the value for which the UART itself is programmed.

DSCLP/SSCLP-200/300 User's Manual

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Contents DSCLP/SSCLP-200/300 Warranty Information Iii Manufacturers Address Manufacturers NameApplication of Council Directive Standards to which Conformity is DeclaredHardware Installation Address Map and Special Registers Hardware ConfigurationRS-422 or RS-485 Signal Line Termination Base Address and Interrupt Level IRQHalf-Duplex/Full-Duplex/Auto-Toggle Selection Page General Information Jumpers J6-J9 Full-duplex/Half-duplex Operation Signal ConnectionsRight Card Edge Jumpers Jumpers J10-J23 define the options for this card1 CTS0SEL, CTS1SEL J10 Clock Rate and Optional Registers Enable Scratchpad Register SPAD, J2Force High-Speed Uart Clock X2, X4, or X8 J3, 4 Clock multiplier jumper options Jumper/connector locations Hardware InstallationChannel Address Range Interrupt Status Register Enabling the Special RegistersDlab Bit Spad Jumper Register selected for Bit DescriptionQuatech Modem Control Register Quatech Modem Control RegisterBit Name Description Options RegisterWrite Read Clock Rate Uart Clock Maximum Data Multiplier Frequency Clock Rate MultiplierWindows Millennium Windows ConfigurationsWindows Windows Page Windows Windows NT Viewing Resources with Device Manager Two-Port RS-422/RS485 Serial Adapter Page DSCLP-200/300 Two-Port RS-422/485 Serial Adapter Page Page Page Page OS/2 Other Operating SystemsDOS and other operating systems QTPCI.EXE QTPCI.EXE Expert Mode display Jumper/Channel correspondence External ConnectionsRclk RTS/CTS HandshakeAUXIN/AUXOUT Loopback TclkHalf-Duplex/Full-Duplex/Auto-Toggle Selection Half/full-duplex and Auto-Toggle selection RS-422/485 Line termination resistance values Termination ResistorsRS-422/485 Peripheral Connection DSCLP-200/300 connector definitionsINTA# PCI Resource MapWith 64-byte FIFOs optional SpecificationsComputer will not boot up TroubleshootingCannot communicate with other equipment DSCLP/SSCLP-200/300