Quatech DSCLP-300, SSCLP-300, SSCLP-200, DSCLP-200 user manual RTS/CTS Handshake, Rclk

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7.1 RTS/CTS Handshake

Transmission of RTS, combined with reception of CTS, allows for hardware handshaking (data flow control) between the UART and the external device. RTS is transmitted on AUXOUT by not connecting pins 1 and 2 of the jumper blocks J11-12. CTS is received on AUXIN by not connecting pins 1 and 2 of the jumper block J10. If RTS/CTS handshaking is not desired, the RTS output can be looped back to the CTS input by connecting pins 1 and 2 of the jumper block J10. Figure 16 shows how to select the RTS/CTS mode.

Jumpers J10-12

J10 CTS0_SEL

J11 AUX0_SEL0

J12AUX0_SEL1

Transmit RTS on AUXOUT Receive CTS on AUXIN

J10 CTS0_SEL

J11 AUX0_SEL0

J12AUX0_SEL1

Loopback RTS to CTS

Figure 16 --- RTS/CTS selection

7.2 RCLK

This is the clock signal used by the receiver portion of the UART. It is generally provided by connecting it to the UART's own transmit clock output (TCLK). This is done by not connecting pins 1 and 2 of the jumper block J13. If desired, RCLK can be received from an external source over the AUXIN line by connecting pins 1 and 2 of the jumper block J13. Figure 17 shows how to select the RCLK mode.

Jumper J13

J13

RCLK0_SEL

J13

Loopback TCLK to RCLK

RCLK0_SEL

Receive RCLK on AUXIN

Figure 17 --- RCLK selection

DSCLP/SSCLP-200/300 User's Manual

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Contents DSCLP/SSCLP-200/300 Warranty Information Iii Standards to which Conformity is Declared Manufacturers NameManufacturers Address Application of Council DirectiveBase Address and Interrupt Level IRQ Hardware ConfigurationHardware Installation Address Map and Special Registers RS-422 or RS-485 Signal Line TerminationHalf-Duplex/Full-Duplex/Auto-Toggle Selection Page General Information Jumpers J6-J9 Full-duplex/Half-duplex Operation Signal ConnectionsRight Card Edge Jumpers Jumpers J10-J23 define the options for this card1 CTS0SEL, CTS1SEL J10 Enable Scratchpad Register SPAD, J2 Clock Rate and Optional RegistersForce High-Speed Uart Clock X2, X4, or X8 J3, 4 Clock multiplier jumper options Jumper/connector locations Hardware InstallationChannel Address Range Bit Description Enabling the Special RegistersInterrupt Status Register Dlab Bit Spad Jumper Register selected forQuatech Modem Control Register Quatech Modem Control RegisterOptions Register Bit Name DescriptionWrite Read Clock Rate Uart Clock Maximum Data Multiplier Frequency Clock Rate MultiplierWindows Millennium Windows ConfigurationsWindows Windows Page Windows Windows NT Viewing Resources with Device Manager Two-Port RS-422/RS485 Serial Adapter Page DSCLP-200/300 Two-Port RS-422/485 Serial Adapter Page Page Page Page Other Operating Systems OS/2DOS and other operating systems QTPCI.EXE QTPCI.EXE Expert Mode display Jumper/Channel correspondence External ConnectionsRclk RTS/CTS HandshakeAUXIN/AUXOUT Loopback TclkHalf-Duplex/Full-Duplex/Auto-Toggle Selection Half/full-duplex and Auto-Toggle selection RS-422/485 Line termination resistance values Termination ResistorsRS-422/485 Peripheral Connection DSCLP-200/300 connector definitionsINTA# PCI Resource MapWith 64-byte FIFOs optional SpecificationsTroubleshooting Computer will not boot upCannot communicate with other equipment DSCLP/SSCLP-200/300