Support Information
Table 3-1. CPU to Base Board PX1/PY1 Connector Signals (continued)
Pin(s) | Signal | Description | |
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66 | UART1_TXD | UART1 TRANSMITTED DATA — Serial output signal | |
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67 | UART2_RTS | UART2 REQUEST TO SEND — Active low input signal | |
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68 | UART2_CTS | UART2 CLEAR TO SEND — Active low output signal | |
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69 | UART2_RXD | UART2 RECEIVED DATA — Serial input signal | |
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70 | UART2_TXD | UART2 TRANSMITTED DATA — Serial output signal | |
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71 | BOOT3 | BOOT location select input bit 3 | |
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72 | BOOT2 | BOOT location select input bit 2 | |
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73 | BOOT1 | BOOT location select input bit 1 | |
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74 | BOOT0 | BOOT location select input bit 0 | |
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75 | PWM0 | PULSE WIDTH MODULATOR OUTPUT | |
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76 | TIN | TIMER INPUT CAPTURE — Timer input | |
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77 | JTAG_CTRL | JTAG CONTROL — input to select between and ARM and normal JTAG operation | |
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78 | TOUT | TIMER OUTPUT | |
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79 | RESET_IN_B | RESET IN — Active low reset signal to the processor | |
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80 | RESET_OUT_B | RESET OUT — Active low reset signal from the processor | |
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81 | POR_B | POWER ON RESET | |
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82 | RTCK_GPIO | RETURN CLOCK — JTAG signal, can be general purpose I/O | |
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83 | CLKMODE0 | CLOCK MODE BIT 0 — Selects PLL bypass modes | |
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84 | CLKMODE1 | CLOCK MODE BIT 1 — Selects PLL bypass modes | |
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85 | B_CS5_B | BUFFERED CHIP SELECTS 5 — Chip select signal, active low output (Reserved) | |
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86 | B_CS4_B | BUFFERED CHIP SELECTS 4 — Chip select signal, active low output (Reserved) | |
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87 | B_CS1_B | BUFFERED CHIP SELECTS 1 — Chip select signal, active low output | |
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88 | B_CS0_B | BUFFERED CHIP SELECTS 0 — Chip select signal, active low output (Reserved) | |
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89 | B_OE_B | BUFFERED OUTPUT ENABLE— Enables external devices to drive the data bus, | |
active low output | |||
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90 | B_RW_B | BUFFERED READ/WRITE — A low indicates an external write operation, a high indicates | |
a read operation type | |||
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91 | B_NEXUSEVTI | Internal use only | |
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92 | NEXUS_EN_B | Internal use only | |
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93 | B_A0 | BUFFERED ADDRESS 0— Buffered address output (Reserved) | |
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94 | B_A1 | BUFFERED ADDRESS 1— Buffered address output | |
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95 | B_A2 | BUFFERED ADDRESS 2 — Buffered address output | |
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| M9328MX21ADSE User’s Manual, Rev. A |
Freescale Semiconductor |