Support Information
Table 3-4. CPU to Option Card PK2 Connector Signals
Pin(s) | Signal | Description | ||||||
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1, 60 | VCC | +3.0 VDC power | ||||||
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2 | NFIO1 PC_VS2 | PCMCIA VOLTAGE SENSE 2 — Input signal to select card voltage* | ||||||
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3 | NFIO0 PC_BVD1 | PCMCIA BATTERY VOLTAGE DETECT 1 — Input signal to report battery status* | ||||||
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4 | NFIO3 PC_WP | PCMCIA WRITE PROTECT — Input signal from the PCMCIA card* | ||||||
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5 | NFIO2 PC_VS1 | PCMCIA VOLTAGE SENSE 1 input signal to select PCMCIA card voltage* | ||||||
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6, 9 | P2.5V | + 2.5 VDC power | ||||||
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7 | NFIO4 PC_READY | PCMCIA READY — Input signal to indicate the card is ready for access* | ||||||
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8 | NFIO5 PC_WAIT | PCMCIA WAIT — Input signal to extend the current access* | ||||||
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10 | NFIO7 |
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| PCMCIA CARD DETECT 1 — Input signal to indicate a card is inserted* |
PC_CD1 | ||||||||
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11 | NFIO6 |
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| PCMCIA CARD DETECT 2 — Input signal to indicate a card is inserted* |
PC_CD2 | ||||||||
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12 | NFRE_B |
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| PCMCIA READ/WRITE — Data direction control, active low to write* | ||
PC_RW | ||||||||
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13 | NFWE_B PC_BVD2 | PCMCIA BATTERY VOLTAGE DETECT 2 — Input signal to report battery status* | ||||||
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14, 53 | P1.8V | +1.8 VDC power | ||||||
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15 | NFALE |
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| PCMCIA OUTPUT ENABLE — Output used to enable memory read data* | |||
PC_OE | ||||||||
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16 | NFCLE PC_POE | PCMCIA Buffer OUTPUT ENABLE — Output used | ||||||
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17 | NFWP_B PC_CE2 | PCMCIA CARD ENABLE 2 — Output used to enable odd bytes* | ||||||
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18 | NFCE_B PC_CE1 | PCMCIA CARD ENABLE 1 — Output used to enable even bytes* | ||||||
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19 | NFRB PC_RST | PCMCIA RESET — Output to reset a card’s Configuration Option Register* | ||||||
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20 | PC_PWRON | PCMCIA input to indicate card power is applied and stable | ||||||
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21 | D23 | DATA BIT 23 — Bidirectional data bit from the processor | ||||||
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22 | D24 | DATA BIT 24 — Bidirectional data bit from the processor | ||||||
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23 | D22 | DATA BIT 22 — Bidirectional data bit from the processor | ||||||
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24 | D25 | DATA BIT 25 — Bidirectional data bit from the processor | ||||||
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25 | D21 | DATA BIT 21 — Bidirectional data bit from the processor | ||||||
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26 | D26 | DATA BIT 26 — Bidirectional data bit from the processor | ||||||
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27 | D20 | DATA BIT 20 — Bidirectional data bit from the processor | ||||||
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28 | D27 | DATA BIT 27 — Bidirectional data bit from the processor | ||||||
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29 | D19 | DATA BIT 19 — Bidirectional data bit from the processor | ||||||
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30 | D28 | DATA BIT 28 — Bidirectional data bit from the processor | ||||||
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31 | D18 | DATA BIT 18 — Bidirectional data bit from the processor | ||||||
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| M9328MX21ADSE User’s Manual, Rev. A |
Freescale Semiconductor |