Support Information
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| Pin(s) | Signal | Description |
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| A1 | CSPI2_MOSI | MASTER OUT / SLAVE IN — CSPI data signal (bidirectional) |
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| A2 | CSPI2_MISO | MASTER IN / SLAVE OUT — CSPI data signal (bidirectional) |
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| A3 | CSPI2_SCLK | SERIAL CLOCK — Bidirectional |
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| A4 | CSPI2_SS0 | SLAVE SELECT 0 — CSPI signal (bidirectional) |
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| A5 | CSPI2_SS1 | SLAVE SELECT 1 — CSPI signal (bidirectional) |
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| A6 | CSPI2_SS2 | SLAVE SELECT 2 — CSPI signal (bidirectional) |
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| A7 | I2C_CLK | I SQUARED C CLOCK — Serial clock, bidirectional |
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| A8 | I2C_DATA | I SQUARED C DATA — Serial data, bidirectional |
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| A9 | SSI3_CLK | SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK — Bidirectional, output in |
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| master mode and input in slave mode |
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| A10 | SSI3_TXD | SYCHRONOUS SERIAL INTERFACE TRANSMITTED DATA — Serial output signal |
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| A11 | SSI3_RXD | SYCHRONOUS SERIAL INTERFACE RECEIVED DATA — Serial input signal |
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| A12 | SSI3_FS | SYCHRONOUS SERIAL INTERFACE FRAME SYNC |
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| A13 | SSI2_CLK | SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK — Bidirectional, output in |
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| master mode and input in slave mode |
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| A14 | SSI2_TXD | SYCHRONOUS SERIAL INTERFACE TRANSMITTED DATA — Serial output signal |
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| A15 | SSI2_RXD | SYCHRONOUS SERIAL INTERFACE RECEIVED DATA — Serial input signal |
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| A16 | SSI2_FS | SYCHRONOUS SERIAL INTERFACE FRAME SYNC |
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| B1 | USBG_RXDP | USB OTG RECEIVED DATA PLUS input |
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| B2 | USBG_RXDM | USB OTG RECEIVED DATA MINUS input |
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| B3 | USBG_TXDP | USB OTG TRANSMITTED DATA PLUS output |
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| B4 | USBG_TXDM | USB TRANSMITTED DATA MINUS output |
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| B5 | USBG_OE_B | USB OTG OUTPUT ENABLE |
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| B6 | USBG_FS | USB OTG FULL SPEED |
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| B7 | USBG_ON_B | USB OTG transceiver ON |
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| B8 | USBG_SCL | USB OTG SERIAL CLOCK |
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| B9 | USBG_SDA | USB OTG SERIAL DATA |
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| B10 | USBH1_RXDM | USB RECEIVED DATA MINUS input |
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| B11 | USBH1_RXDP | USB RECEIVED DATA PLUS input. |
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| B12 | USBH1_TXDM | USB TRANSMITTED DATA MINUS output |
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| B13 | USBH1_TXDP | USB TRANSMITTED DATA PLUS output |
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| M9328MX21ADSE User’s Manual, Rev. A | |
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| Freescale Semiconductor |