Freescale Semiconductor M9328MX21ADSE user manual DQM1EB1B, DQM0EB0B, Oeb

Page 42

Support Information

 

 

Table 3-3. CPU to Option Card PK1 Connector Signals

 

 

 

Pin(s)

Signal

Description

 

 

 

32

D13

DATA BIT 13 — Bidirectional data bit from the processor

 

 

 

 

33

 

D1

DATA BIT 1 — Bidirectional data bit from the processor

 

 

 

34

D14

DATA BIT 14 — Bidirectional data bit from the processor

 

 

 

 

35

 

D0

DATA BIT 0 — Bidirectional data bit from the processor

 

 

 

36

D15

DATA BIT 15 — Bidirectional data bit from the processor

 

 

 

37

DQM1_EB1_B

ENABLE BYTE 1 — D23-D16 for SDRAM, D15-D8 for other memory types

 

 

 

38

SDCLK

SDRAM CLOCK — Main clock signal to SDRAM devices

 

 

 

39

DQM0_EB0_B

ENABLE BYTE 0 — D31-D24 for SDRAM, D7-D0 for other memory types

 

 

 

40

A18

ADDRESS BIT 18 — Output line for addressing external devices

 

 

 

41

SDCKE0

SDRAM CLOCK ENABLE 0 — Active high outputs to SDRAM

 

 

 

42

A17

ADDRESS BIT 17 — Output line for addressing external devices

 

 

 

43

MA10

MULTIPLEXED ADDRESS BIT 1O — Multiplexed address bit to SDRAM

 

 

 

44

A10

ADDRESS BIT 10 — Output line for addressing external devices

 

 

 

 

46

 

A9

ADDRESS BIT 9 — Output line for addressing external devices

 

 

 

47

A16

ADDRESS BIT 16 — Output line for addressing external devices

 

 

 

 

48

 

A7

ADDRESS BIT 7 — Output line for addressing external devices

 

 

 

49

A14

ADDRESS BIT 14 — Output line for addressing external devices

 

 

 

 

50

 

A6

ADDRESS BIT 6 — Output line for addressing external devices

 

 

 

 

52

 

A8

ADDRESS BIT 8 — Output line for addressing external devices

 

 

 

53

A15

ADDRESS BIT 15 — Output line for addressing external devices

 

 

 

 

54

 

A11

ADDRESS BIT 11 — Output line for addressing external devices

 

 

 

55

A13

ADDRESS BIT 13 — Output line for addressing external devices

 

 

 

56, 59

P5V

Switched +5 VDC power

 

 

 

57

A12

ADDRESS BIT 12 — Output line for addressing external devices

 

 

 

 

 

58

OE_B

 

 

PCMCIA IO WRITE— Active low output for I/O writes*

PC_IOWR

 

 

 

60

ECB_B

END CURRENT BURST — Active low input signal asserted by external burst devices

 

 

 

 

 

*The signal name in italics is the function intended for operation with this connector. It is multiplexed inside the i.MX21 processor with the listed signal.

 

M9328MX21ADSE User’s Manual, Rev. A

3-14

Freescale Semiconductor

Image 42
Contents M9328MX21ADSE Application Development System Page General Information M9328MX21ADSE User’s Manual, Rev. aFreescale Semiconductor Revision History Location RevisionDefinitions, Acronyms, and Abbreviations M9328MX21ADSE Features DescriptionM9328MX21ADSE Diagram System and User RequirementsM9328MX21ADSE Application Development System ADS Specifications SpecificationsCharacteristic Specifications Configuring Board Components Component Configuration SettingsIntroduction Switch Name Setting Effect Peripheral Selection Switch S1S1 Switch Settings Component Position EffectBoot Mode, Device Mode/User Switch S2Boot Mode Switch Settings BOOT3 BOOT2 BOOT1 BOOT0Functional Block Diagram OperationOn-Board Memory Memory Map Burst Flash InterfaceM9328MX21ADSE Memory Map USB On-The-Go InterfaceUart and IrDA Peripheral Chip Select Address Range HEX Act Mem SizeEthernet UARTs and IrDA InterfaceTouchscreen ADC Ethernet InterfaceKeypad Audio ConnectorsCD Quality Codec Keypad Layout and ConnectionsMemory Mapped I/O Input Buffer SignalsSignal Description BITOutput Latch Functions Bit Signal DescriptionBIT Reseteuart BIT TP6LED Indicators Using The Board ConnectorsAudio Indicator Buzzer Function of LED IndicatorsPE1 Add-On Module Connections and UsageWM8731SEDS Codec CPU10. Installation of the Main Boards Using the TFT LCD Display Panel 12. Installation of the TV Encoder CardUsing a SD/MMC Card Using the KeypadUsing a Nand Flash Card Using Image Sensor Daughter CardUsing the TV Encoder Card M9328MX21ADSE User’s Manual, Rev. a CPU to Base Board Connectors PX1, PX2, PY1, and PY2 Support InformationCPU to Base Board PX1/PY1 Connector Pin Assignments PX1CPU to Base Board PX1/PY1 Connector Signals Pins Signal DescriptionUART3TXD Usbgoeb USB OTG Output Enable UsbgrxdmUSB Output Enable UART3CTSResetoutb BOOT0Tout Timer Output Porb Power on Reset RtckgpioBA3 Buffered Address 3 Buffered address output CPU to Base Board PX2/PY2 Connector Pin Assignments PX2CPU to Base Board PX2/PY2 Connector Signals SSI3FS Sychronous Serial Interface Frame Sync SSI3TXDSSI3RXD SSI2TXDKPROW3 KPROW5KPROW4 KPROW2Resetsw CPU to Option Card Connectors PK1CPU to Option Card PK1 Connector Signals NexusevtigpioClko DQM1EB1B DQM0EB0BOEB NFIO5 PK2NFIO1 NFIO3 NfrebCPU to Option Card PK2 Connector Signals Casb SdwebRasb LbabUART/RS-232 Connectors UART1 ConnectorConnector P1 UART1 DCE Signal Descriptions UART4 Connector Connector P2 UART4 DTE Signal DescriptionsPin Signal Description Connector P3 EXT Uart DCE Signal Descriptions Multi-ICE ConnectorExternal Uart Connector P20Ethernet Connector Multi-ICE Connector P20 on the CPU Signal DescriptionsVbus USB Data Minus USB Data Plus GND Ground USB OTG ConnectorNand Flash Connector PM111. Nand Flash Connector PM1 Signal Descriptions PM2NFIO1 12. Nand Flash Connector PM2 Signal DescriptionsNFIO0 NFIO2UART2RXD KEYCOL7 External Keypad ConnectorUART2RTS UART2TXD KEYCOL6LCD Panel Connector TV Encoder Connector TOPP13 12 SD/MMC Connector Extension and Image Sensor ConnectorsDescription Pins Signal MMC Card SD Card Bit Mode I2CDAT 18. Extension Connector PE2 Signal Description GND Ground CSPI1MOSI SSI1FS Sychronous Serial Interface Frame SyncBnexusevti Buffered Nexus Event SSI2FS Sychronous Serial Interface Frame Sync Usbgrxdp 19. Extension Connector PE3 Signal DescriptionUsbgoeb USB OTG Output Enable Usbgfs USB OTG Full Speed USB OTG Serial Clock Usbgsda USB OTG Serial DataGND Ground TIN USB PowerDisposal Information ToutM9328MX21ADSE User’s Manual, Rev. a Page How to Reach Us