Support Information
Table 3-1. CPU to Base Board PX1/PY1 Connector Signals (continued)
Pin(s) | Signal | Description |
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96 | B_A3 | BUFFERED ADDRESS 3 — Buffered address output |
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97 | B_D7 | BUFFERED DATA 7— Buffered bidirectional data bus bit |
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98 | B_D15 | BUFFERED DATA 15 — Buffered bidirectional data bus bit |
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99 | B_D6 | BUFFERED DATA 6 — Buffered bidirectional data bus bit |
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100 | B_D14 | BUFFERED DATA 14 — Buffered bidirectional data bus bit |
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101 | B_D5 | BUFFERED DATA 5— Buffered bidirectional data bus bit |
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102 | B_D13 | BUFFERED DATA 13 — Buffered bidirectional data bus bit |
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103 | B_D4 | BUFFERED DATA 4 — Buffered bidirectional data bus bit |
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104 | B_D12 | BUFFERED DATA 12 — Buffered bidirectional data bus bit |
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105 | B_D3 | BUFFERED DATA 3 — Buffered bidirectional data bus bit |
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106 | B_D11 | BUFFERED DATA 11 — Buffered bidirectional data bus bit |
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107 | B_D2 | BUFFERED DATA 2 — Buffered bidirectional data bus bit |
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108 | B_D10 | BUFFERED DATA 10— Buffered bidirectional data bus bit |
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109 | B_D1 | BUFFERED DATA 1 — Buffered bidirectional data bus bit |
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110 | B_D9 | BUFFERED DATA 9— Buffered bidirectional data bus bit |
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111 | B_D0 | BUFFERED DATA 0— Buffered bidirectional data bus bit |
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112 | B_D8 | BUFFERED DATA 8— Buffered bidirectional data bus bit |
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113 | B_A20 | BUFFERED ADDRESS 20 — Buffered address output (Reserved) |
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114 | B_A21 | BUFFERED ADDRESS 21 — Buffered address output |
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115 | B_A22 | BUFFERED ADDRESS 22 — Buffered address output |
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116 | B_A23 | BUFFERED ADDRESS 23 — Buffered address output |
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117 | B_A24 | BUFFERED ADDRESS 24 — Buffered address output (Reserved) |
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118 | B_A25 | BUFFERED ADDRESS 25 — Buffered address output (Reserved) |
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119 | TP25 | Test point |
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| M9328MX21ADSE User’s Manual, Rev. A |
Freescale Semiconductor |