Freescale Semiconductor M9328MX21ADSE user manual Memory Map, Burst Flash Interface

Configuration and Operation

CS0

ECB

A2...A24

BCLK

OE

LBA

DQM3_EB3

FLASH_RST D0.15

DQM1_EB1

D16..31

VCC VCC VCC

8MX16-Bit Burst Flash

CS

WP

ACC

8MX16-Bit Burst Flash

RDY

A0...A22

CLK

OE

AVD

WE

RESET

D0..15

WE

D0.15

Figure 2-4. Burst Flash Interface

CS2

SDCKE0 SDCLK RAS CAS WE

A2..A18

BA0

A19

A20 DQM1_EB1 DQM0_EB0

D0..15

DQM3_EB3 DQM2_EB2

D16..31

VCC
	16MX16-Bit SDRAM
CS
CKE
CLK
RAS
CAS	16MX16-Bit SDRAM
WE
A0..10
A11
BA0
BA1
LDQM
UDQM
D0..15
	LDQM
	UDQM
	D0..15

Figure 2-5. SDRAM Interface

2.3.3Memory Map

Table 2-4shows the memory map for external peripherals on the ADS board. Because the Burst Flash and the Ethernet Controller do not take up the entire address space of the associated chip selects, software can access the same physical memory location at more than one range of addresses. For instance, SDRAM uses

	M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor	2-5