Freescale Semiconductor M9328MX21ADSE user manual USB On-The-Go Interface, Uart and IrDA

Page 16

Configuration and Operation

the entire 64 MB address space allowed for CSD0, but the Burst Flash occupies only 32 MB of the 64 MB space available to CS0, so it appears in two different ranges of addresses. CS1 covers 16 MB allowing many repetitions of the memory mapped peripherals.

Table 2-4. M9328MX21ADSE Memory Map

Peripheral

Chip Select

Address Range (HEX)

Act Mem Size

 

 

 

 

 

 

 

 

 

SDRAM

 

 

 

 

 

 

0xC000_0000 to 0xC3FF_FFFF

64 MB

 

CSD0

 

 

 

 

 

 

 

 

Burst FLASH

 

 

 

 

 

0xC800 0000 to 0xC9FF_FFFF

32 MB

 

 

 

CS0

 

 

 

 

 

 

 

 

Ethernet Controller

 

 

 

 

 

0xCC00 0000 to 0xCC00_000F*

16 BYTES

 

CS1

 

 

 

 

 

 

 

External DUART

 

 

 

 

 

0xCC20 0000 to 0xCC20_000F*

16 BYTES

 

 

CS1

 

 

 

 

 

 

 

 

 

Read CPU and

 

 

 

 

 

 

Read 0xCC40_0000*

 

 

 

 

CS1

2 BYTES

Base board versions

 

 

 

D7-D0 = CPU, D15-D8 = Base board

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Write to 0xCC80_0000* (Output)

2 BYTES

Memory Mapped I/O

 

 

 

CS1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read 0xCC80_0000* (Input)

2 BYTES

 

 

 

 

CS1

 

 

 

 

 

 

 

 

 

 

* For I/O operations only D15 - D0 are used

2.3.4USB On-The-Go Interface

The i.MX21 USB OTG Device Module interfaces with a Phillips ISP1301BS USB transceiver connected to P4, a mini AB USB connector. The interface can function as either a USB host or USB device. The interface includes a Maxim MAX3355EUD+ USB power supply chip which can provide power on the USB bus in host mode. This power supply chip is enabled by the USB_PWR signal. For details on the operation of the USB interface, refer to the i.MX21 data sheet. Figure 2-6shows the USB interface connection.

i.MX21

USB_PWR

ISP1301BS

D-

D+

VBUS

ID

VBUS

IDIN

IDOUT

SHDN

MAX3355EUD+

P4

USB MINI AB

USB Device

Figure 2-6. USB OTG Interface

2.3.5UART and IrDA

Figure 2-7shows how to connect the UART and IrDA circuits.

M9328MX21ADSE User’s Manual, Rev. A

2-6

Freescale Semiconductor

Image 16
Contents M9328MX21ADSE Application Development System Page General Information M9328MX21ADSE User’s Manual, Rev. aFreescale Semiconductor Revision History Location RevisionDefinitions, Acronyms, and Abbreviations M9328MX21ADSE Features DescriptionM9328MX21ADSE Diagram System and User RequirementsM9328MX21ADSE Application Development System Specifications ADS SpecificationsCharacteristic Specifications Component Configuration Settings Configuring Board ComponentsIntroduction Peripheral Selection Switch S1 S1 Switch SettingsSwitch Name Setting Effect Component Position EffectMode/User Switch S2 Boot Mode Switch SettingsBoot Mode, Device BOOT3 BOOT2 BOOT1 BOOT0Operation Functional Block DiagramOn-Board Memory Memory Map Burst Flash InterfaceUSB On-The-Go Interface Uart and IrDAM9328MX21ADSE Memory Map Peripheral Chip Select Address Range HEX Act Mem SizeEthernet UARTs and IrDA InterfaceTouchscreen ADC Ethernet InterfaceAudio Connectors CD Quality CodecKeypad Keypad Layout and ConnectionsInput Buffer Signals Signal DescriptionMemory Mapped I/O BITBit Signal Description BIT ReseteuartOutput Latch Functions BIT TP6Using The Board Connectors Audio Indicator BuzzerLED Indicators Function of LED IndicatorsAdd-On Module Connections and Usage WM8731SEDS CodecPE1 CPU10. Installation of the Main Boards Using the TFT LCD Display Panel 12. Installation of the TV Encoder CardUsing the Keypad Using a Nand Flash CardUsing a SD/MMC Card Using Image Sensor Daughter CardUsing the TV Encoder Card M9328MX21ADSE User’s Manual, Rev. a CPU to Base Board Connectors PX1, PX2, PY1, and PY2 Support InformationCPU to Base Board PX1/PY1 Connector Pin Assignments PX1CPU to Base Board PX1/PY1 Connector Signals Pins Signal DescriptionUsbgoeb USB OTG Output Enable Usbgrxdm USB Output EnableUART3TXD UART3CTSBOOT0 Tout Timer OutputResetoutb Porb Power on Reset RtckgpioBA3 Buffered Address 3 Buffered address output CPU to Base Board PX2/PY2 Connector Pin Assignments PX2CPU to Base Board PX2/PY2 Connector Signals SSI3TXD SSI3RXDSSI3FS Sychronous Serial Interface Frame Sync SSI2TXDKPROW5 KPROW4KPROW3 KPROW2Resetsw CPU to Option Card Connectors PK1Nexusevtigpio CPU to Option Card PK1 Connector SignalsClko DQM0EB0B DQM1EB1BOEB PK2 NFIO1 NFIO3NFIO5 NfrebCPU to Option Card PK2 Connector Signals Sdweb RasbCasb LbabUART1 Connector UART/RS-232 ConnectorsConnector P1 UART1 DCE Signal Descriptions Connector P2 UART4 DTE Signal Descriptions UART4 ConnectorPin Signal Description Multi-ICE Connector External Uart ConnectorConnector P3 EXT Uart DCE Signal Descriptions P20Ethernet Connector Multi-ICE Connector P20 on the CPU Signal DescriptionsUSB OTG Connector Nand Flash ConnectorVbus USB Data Minus USB Data Plus GND Ground PM111. Nand Flash Connector PM1 Signal Descriptions PM212. Nand Flash Connector PM2 Signal Descriptions NFIO0NFIO1 NFIO2External Keypad Connector UART2RTSUART2RXD KEYCOL7 UART2TXD KEYCOL6LCD Panel Connector TOP TV Encoder ConnectorP13 Extension and Image Sensor Connectors 12 SD/MMC ConnectorDescription Pins Signal MMC Card SD Card Bit Mode I2CDAT 18. Extension Connector PE2 Signal Description SSI1FS Sychronous Serial Interface Frame Sync GND Ground CSPI1MOSIBnexusevti Buffered Nexus Event 19. Extension Connector PE3 Signal Description Usbgoeb USB OTG Output Enable Usbgfs USB OTG Full SpeedSSI2FS Sychronous Serial Interface Frame Sync Usbgrxdp USB OTG Serial Clock Usbgsda USB OTG Serial DataUSB Power Disposal InformationGND Ground TIN ToutM9328MX21ADSE User’s Manual, Rev. a Page How to Reach Us