Cypress CY7C1382DV25 manual Truth Table for Read/Write 6, Function CY7C1380DV25/CY7C1380FV25

Page 10

CY7C1380DV25, CY7C1380FV25

CY7C1382DV25, CY7C1382FV25

Truth Table for Read/Write [6, 9]

Function (CY7C1380DV25/CY7C1380FV25)

GW

BWE

BWD

BWC

BWB

BWA

Read

H

H

X

X

X

X

 

 

 

 

 

 

 

Read

H

L

H

H

H

H

 

 

 

 

 

 

 

Write Byte A – (DQA and DQPA)

H

L

H

H

H

L

Write Byte B – (DQB and DQPB)

H

L

H

H

L

H

Write Bytes B, A

H

L

H

H

L

L

 

 

 

 

 

 

 

Write Byte C – (DQC and DQPC)

H

L

H

L

H

H

Write Bytes C, A

H

L

H

L

H

L

 

 

 

 

 

 

 

Write Bytes C, B

H

L

H

L

L

H

 

 

 

 

 

 

 

Write Bytes C, B, A

H

L

H

L

L

L

 

 

 

 

 

 

 

Write Byte D – (DQD and DQPD)

H

L

L

H

H

H

Write Bytes D, A

H

L

L

H

H

L

 

 

 

 

 

 

 

Write Bytes D, B

H

L

L

H

L

H

 

 

 

 

 

 

 

Write Bytes D, B, A

H

L

L

H

L

L

 

 

 

 

 

 

 

Write Bytes D, C

H

L

L

L

H

H

 

 

 

 

 

 

 

Write Bytes D, C, A

H

L

L

L

H

L

 

 

 

 

 

 

 

Write Bytes D, C, B

H

L

L

L

L

H

 

 

 

 

 

 

 

Write All Bytes

H

L

L

L

L

L

 

 

 

 

 

 

 

Write All Bytes

L

X

X

X

X

X

 

 

 

 

 

 

 

Truth Table for Read/Write [6, 9]

 

 

 

 

 

 

 

 

 

 

 

 

 

Function (CY7C1382DV25/CY7C1382FV25)

 

GW

 

 

BWE

 

 

BWB

 

BWA

Read

 

H

 

 

H

 

 

X

 

X

 

 

 

 

 

 

 

 

 

 

 

Read

 

H

 

 

L

 

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

Write Byte A – (DQA and DQPA)

 

H

 

 

L

 

 

H

 

L

Write Byte B – (DQB and DQPB)

 

H

 

 

L

 

 

L

 

H

Write Bytes B, A

 

H

 

 

L

 

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

Write All Bytes

 

H

 

 

L

 

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

Write All Bytes

 

L

 

 

X

 

 

X

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

Note:

9. Table only lists a partial listing of the byte write combinations. Any combination of BWX is valid. Appropriate write will be done based on which byte write is active.

Document #: 38-05546 Rev. *E

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Contents 250 MHz 200 MHz 167 MHz Unit FeaturesSelection Guide Cypress Semiconductor CorporationLogic Block Diagram CY7C1380DV25/CY7C1380FV25 3 512K x Logic Block Diagram CY7C1382DV25/CY7C1382FV25 3 1M xCY7C1380DV25 512K X Pin Configurations Pin Tqfp Pinout 3 Chip EnableCY7C1382DV25 1M x Pin Configurations Ball BGA Pinout CY7C1380FV25 512K xPin Configurations Ball Fbga Pinout 3 Chip Enable CY7C1380DV25 512K xName Description Power supply inputs to the core of the devicePin Definitions Byte write select inputs, active LOW. Qualified withSingle Write Accesses Initiated by Adsp Power supply for the IO circuitrySingle Read Accesses Functional OverviewZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Burst SequencesOperation Add. Used CE1 CE2 CE3 Adsp Adsc ADV Write CLKFunction CY7C1380DV25/CY7C1380FV25 Truth Table for Read/Write 6Function CY7C1382DV25/CY7C1382FV25 TAP Controller Block Diagram TAP Controller State DiagramIeee 1149.1 Serial Boundary Scan Jtag Bypass Register TAP Instruction SetParameter Description Min Max Unit Clock TAP AC Switching CharacteristicsTAP Timing Hold Times5V TAP AC Output Load Equivalent TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Identification Register DefinitionsInstruction Code Description Identification CodesBall BGA Boundary Scan Order 13 Bit # Ball IDA11 Maximum Ratings Electrical CharacteristicsOperating Range AC Test Loads and Waveforms CapacitanceThermal Resistance Package250 MHz 200 MHz 167 MHz Parameter Description Min Switching CharacteristicsSetup Times Output TimesSwitching Waveforms Read Cycle TimingWrite Cycle Timing 25 Read/Write Cycle Timing 25, 27 CLZZZ Mode Timing 29 DON’T CareOrdering Information CY7C1382DV25-250BZXI Document # 38-05546 Rev. *E Package Diagrams Pin Thin Plastic Quad Flat pack 14 x 20 x 1.4 mmBall BGA 14 x 22 x 2.4 mm Soldernotespad Type NON-SOLDER Mask Defined Nsmd Document History Issue Orig. Description of Change DateDocument Number

CY7C1382DV25, CY7C1380DV25, CY7C1382FV25, CY7C1380FV25 specifications

The Cypress CY7C1380FV25, CY7C1382FV25, CY7C1380DV25, and CY7C1382DV25 are high-performance static random access memory (SRAM) devices distinguished by their reliability and efficiency. These components are designed for applications requiring fast data storage and retrieval, making them ideal for embedded systems, communication devices, and various consumer electronics.

One of the main features of these SRAMs is their access time. The CY7C1380FV25 and CY7C1382FV25 models come with a super-fast access time of 25 nanoseconds, ensuring that data can be retrieved with minimal delay. This characteristic is crucial for high-speed applications, such as networking equipment and automotive systems, where rapid data processing is essential.

Both families of devices offer a competitive data width configuration, with CY7C1380 series providing 8 bits and CY7C1382 series providing 16 bits. This flexibility allows designers to choose the appropriate configuration based on their specific application requirements. Additionally, they support a wide voltage range for ease of integration into various systems.

The CY7C1380FV25 and CY7C1380DV25 devices feature low power consumption, which is vital for battery-operated devices. With their advanced CMOS technology, they exhibit reduced static power requirements, helping to prolong battery life and improve overall system efficiency. The IDD (supply current) ratings are particularly low, making them suitable for energy-sensitive applications.

A notable characteristic of the Cypress memory devices is their asynchronous read and write operations, providing simple interfacing in a variety of designs. They are designed to operate under a wide range of temperature conditions; thus, they are well-suited for industrial applications where temperature fluctuations might be a concern.

Furthermore, the CY7C1382FV25 and CY7C1382DV25 models include features like burst mode capability, enabling faster sequential access, which is beneficial for high-speed data processing tasks. This allows these SRAMs to deliver enhanced performance critical in applications like video processing and real-time data acquisition.

In summary, the Cypress CY7C1380FV25, CY7C1382FV25, CY7C1380DV25, and CY7C1382DV25 are distinguished by their fast access times, low power consumption, and flexible data widths. Their advanced technologies and characteristics make them a reliable choice for a diverse range of high-performance applications, ensuring that engineers can effectively address their design challenges while meeting the demands of modern electronics.