Cypress CY7C1474V25, CY7C1470V25, CY7C1472V25 5V TAP AC Test Conditions, 8V TAP AC Test Conditions

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CY7C1470V25

CY7C1472V25

CY7C1474V25

2.5V TAP AC Test Conditions

Input pulse levels

VSS to 2.5V

Input rise and fall time

1 ns

Input timing reference levels

1.25V

Output reference levels

1.25V

Test load termination supply voltage

1.25V

1.8V TAP AC Test Conditions

Input pulse levels

0.2V to VDDQ – 0.2

Input rise and fall time

1 ns

Input timing reference levels

0.9V

Output reference levels

0.9V

Test load termination supply voltage

0.9V

2.5V TAP AC Output Load Equivalent

 

1.8V TAP AC Output Load Equivalent

 

 

 

 

 

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

0.9V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50

 

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

ZO= 50

 

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics And Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

(0°C < T < +70°C; V

DD

= 2.5V ±0.125V unless otherwise noted)[11]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

 

Description

 

 

 

 

Test Conditions

 

Min.

 

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH1

 

 

Output HIGH Voltage

 

IOH = –1.0 mA

 

VDDQ = 2.5V

 

1.7

 

 

 

 

 

 

 

 

 

 

 

V

VOH2

 

 

Output HIGH Voltage

 

IOH = –100 A

 

VDDQ = 2.5V

 

2.1

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

1.6

 

 

 

 

 

 

 

 

 

 

 

V

VOL1

 

 

Output LOW Voltage

 

 

 

IOL = 1.0 mA

 

VDDQ = 2.5V

 

 

 

 

0.4

 

V

VOL2

 

 

Output LOW Voltage

 

 

 

IOL = 100 A

 

VDDQ = 2.5V

 

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

 

 

 

0.2

 

V

VIH

 

 

Input HIGH Voltage

 

 

 

 

 

 

VDDQ = 2.5V

 

1.7

 

 

VDD + 0.3

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

1.26

 

 

VDD + 0.3

 

V

VIL

 

 

Input LOW Voltage

 

 

 

 

 

 

VDDQ = 2.5V

 

–0.3

 

0.7

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

–0.3

 

0.36

 

V

IX

 

 

Input Load Current

 

 

 

GND VI VDDQ

 

 

 

 

 

 

–5

 

5

 

 

 

A

Identification Register Definitions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction Field

CY7C1470V25

CY7C1472V25

CY7C1474V25

 

 

 

Description

 

 

 

 

 

(2M x 36)

 

(4M x 18)

(1M x 72)

 

 

 

 

Revision Number (31:29)

 

 

 

 

 

 

 

 

000

 

000

 

000

 

 

 

Describes the version number

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Device Depth (28:24)

 

 

 

 

 

 

 

 

 

 

 

01011

 

01011

 

01011

 

Reserved for internal use

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Architecture/Memory Type(23:18)

 

 

 

 

 

 

001000

 

001000

 

001000

 

Defines memory type and archi-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tecture

 

 

 

 

 

 

 

 

 

 

 

Bus Width/Density(17:12)

 

 

 

 

 

 

100100

 

010100

 

110100

 

Defines width and density

 

 

 

 

 

 

Cypress JEDEC ID Code (11:1)

00000110100

00000110100

00000110100

Allows unique identification of

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SRAM vendor

 

ID Register Presence Indicator (0)

 

 

 

 

 

 

 

 

1

 

1

 

1

 

 

 

Indicates the presence of an ID

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

register

 

 

 

 

 

 

 

 

 

 

 

Note:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11. All voltages referenced to VSS (GND).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document #: 38-05290 Rev. *I

Page 13 of 28

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Contents Logic Block Diagram-CY7C1470V25 2M x FeaturesFunctional Description Cypress Semiconductor CorporationLogic Block Diagram-CY7C1474V25 1M x Logic Block Diagram-CY7C1472V25 4M xSelection Guide 250 MHz 200 MHz 167 MHz Unit4M × Pin Configurations Pin Tqfp PinoutCY7C1472V25 4M x Pin Name Type Pin Description Pin DefinitionsByte Write Select Inputs, active L OW . Qualified with Power supply for the I/O circuitry Power supply inputs to the core of the deviceClock input to the Jtag circuitry Burst Read Accesses Single Read AccessesSingle Write Accesses Burst Write AccessesInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Function CY7C1470V25 BW d BW c BW b BW a Partial Write Cycle Description1, 2, 3Function CY7C1472V25 Function CY7C1474V25Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller Block Diagram TAP Controller State DiagramTAP Instruction Set Instruction RegisterTAP Timing TAP AC Switching Characteristics Over the Operating Range9Parameter Description Min Max Unit Clock Output Times5V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions8V TAP AC Test Conditions Identification Register DefinitionsIdentification Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionBoundary Scan Exit Order 4M x Boundary Scan Exit Order 2M xBit # Ball ID A11 Boundary Scan Exit Order 1M xJ10 W10Maximum Ratings Electrical Characteristics Over the Operating Range12Operating Range Ambient RangeThermal Resistance14 Capacitance14AC Test Loads and Waveforms 250 200 167 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 15Set-up Times Read/Write/Timing21, 22 Switching WaveformsAddress A1 A2 DON’T CareNOP, Stall and Deselect Cycles21, 22 ZZ Mode Timing25Ordering Information 250 Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History ECN No Issue Date Orig. Description of ChangeVKN 472335 See ECN

CY7C1474V25, CY7C1470V25, CY7C1472V25 specifications

The Cypress CY7C1470V25, CY7C1474V25, and CY7C1472V25 are part of Cypress Semiconductor’s family of high-performance synchronous static random-access memory (SRAM) solutions. These memory devices are designed specifically for applications that require fast access times and high bandwidth, making them ideal for a variety of consumer and industrial applications.

One of the standout features of these SRAMs is their performance. They provide high-speed access times, with data transfer rates that can reach up to 1 GHz. This performance is particularly beneficial for high-speed applications including networking equipment, telecommunications, and video processing systems. The CY7C1470V25, for example, offers a 256K x 16 configuration with an access time as low as 3.5 ns. Similarly, the CY7C1474V25 and CY7C1472V25 variants provide respective memory sizes of 1M x 16 and 512K x 16, catering to diverse memory application needs.

These SRAMs utilize a synchronous interface, which provides greater control over data transfers and synchronization with external clock signals. This synchronous operation allows for more efficient data handling in high-speed environments, reducing latency and improving system performance overall.

In terms of power consumption, the Cypress CY7C147x series is designed to operate efficiently. With a low operating voltage of 2.5V, these devices minimize energy usage while still delivering high-speed performance. The low standby power makes them suitable for battery-operated devices, as well as for systems where energy efficiency is a priority.

Furthermore, these SRAMs come with built-in features such as burst mode, which allows for sequential data access, enhancing read and write operations. This is especially useful in applications requiring rapid data retrieval.

The packaging options for the CY7C1470V25, CY7C1474V25, and CY7C1472V25 include both fine-pitch ball grid array (FBGA) and other configurations, facilitating easy integration into various circuit board layouts.

In conclusion, the Cypress CY7C1470V25, CY7C1474V25, and CY7C1472V25 SRAMs are powerful memory solutions that combine high-speed performance, low power consumption, and a synchronous interface. Their robust design makes them suitable for a wide array of applications ranging from communications to consumer electronics, ensuring they meet the demands of modern technology.