CY7C604XX
Register Reference
The section discusses the registers of the enCoRe V LV device. It lists all the registers in mapping tables, in address order.
Register Conventions
The register conventions specific to this section are listed in the following table.
Table 4. Register Conventions
Convention | Description |
R | Read register or bits |
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W | Write register or bits |
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L | Logical register or bits |
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C | Clearable register or bits |
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# | Access is bit specific |
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Register Mapping Tables
The enCoRe V LV device has a total register address space of 512 bytes. The register space is also referred to as IO space and is broken into two parts: Bank 0 (user space) and Bank 1 (config- uration space). The XIO bit in the Flag register (CPU_F) deter- mines which bank the user is currently in. When the XIO bit is set, the user is said to be in the “extended” address space or the “configuration” registers.
Document Number: | Page 11 of 30 |
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