Cypress CY7C604XX manual Package Handling, 125

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CY7C604XX

Figure 11. 48-Pin (7 x 7 x 0.9 mm) QFN (001-13191)

001-13191 *C

Package Handling

Some IC packages require baking before they are soldered onto a PCB to remove moisture that may have been absorbed after leaving the factory. A label on the package has details about the actual bake temperature and the minimum bake time to remove this moisture. The maximum bake time is the aggregate time that the parts exposed to the bake temperature. Exceeding this exposure may degrade device reliability.

Table 21.Package Handling

Parameter

Description

Minimum

Typical

Maximum

Unit

TBAKETEMP

Bake Temperature

 

125

See package label

oC

TBAKETIME

Bake Time

See package label

 

72

hours

 

 

 

 

 

 

Document Number: 001-12395 Rev *H

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Contents Low Voltage FeaturesEnCoRe V LV Block Diagram EnCoReFunctional Overview Getting Started EnCoRe V LV CoreAdditional System Resources PSoC Designer Software Subsystems Development ToolsOrganize and Connect Configure ComponentsDesigning with PSoC Designer Select ComponentsNumeric Naming Document ConventionsAcronyms Used Units of MeasurePin Part Pinout Pin ConfigurationPin Part Pinout QFN Pin No Type Name Description Vss Ground connectionP16 Digital I/O P06 Digital I/O P30 Digital I/O P32 P20 P22 P24 P26P00 Digital I/O P02 Digital I/OP15 Digital I/O, I2C SDA, SPI Miso No connection Top ViewP01 Digital I/O Vss Supply ground No connectionVdd Supply voltage No connection Vss Supply groundRegister Conventions Description Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr 1,Hex Access Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsADC Electrical Specifications Operating Conditions DC Electrical CharacteristicsDC Chip Level Specifications Maximum RatingsDC General Purpose I/O Specifications High Output Voltage Vdd Port 2 or 3 Pins Current in all I/OsSink current on odd port pins for Example, P03 and P15 Input Low Voltage VddInput High Voltage Vdd Input Hysteresis Voltage DC Programming Specifications DC POR and LVD SpecificationsAC Electrical Characteristics AC Chip Level SpecificationsAC General Purpose IO Specifications AC Programming Specifications AC External Clock SpecificationsAC SPI Specifications AC SPI Specifications Symbol Description Min Typ Max UnitsWidth of SS Negated Between Transmissions AC I2C Specifications Packaging Dimensions Package DiagramPin 5 x 5 x 0.55 mm QFN 125 Package HandlingSolder Reflow Peak Temperature Thermal ImpedancesOrdering Information Document History Worldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information