Cypress CY7C604XX manual Pin Configuration, Pin Part Pinout

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CY7C604XX

Pin Configuration

16-Pin Part Pinout

Figure 1. CY7C60413 16-Pin enCoRe V LV Device

Table 1. 16-Pin Part Pinout (QFN)

Pin No.

Type

Name

Description

1

I/O

P2[5]

Digital I/O, Crystal Out (Xout)

 

 

 

 

2

I/O

P2[3]

Digital I/O, Crystal In (Xin)

 

 

 

 

3

IOHR

P1[7]

Digital I/O, I2C SCL, SPI SS

 

 

 

 

4

IOHR

P1[5]

Digital I/O, I2C SDA, SPI MISO

 

 

 

 

5

IOHR

P1[3]

Digital I/O, SPI CLK

 

 

 

 

6

IOHR

P1[1]

Digital I/O, ISSP CLK, I2C SCL, SPI MOSI

 

 

 

 

7

Power

Vss

Ground Pin

 

 

 

 

8

IOHR

P1[0]

Digital I/O, ISSP DATA, I2C SDA, SPI CLK

 

 

 

 

9

IOHR

P1[2]

Digital I/O

 

 

 

 

10

IOHR

P1[4]

Digital I/O, optional external clock input (EXTCLK)

 

 

 

 

11

Input

XRES

Active high external reset with internal pull down

 

 

 

 

12

IOHR

P0[4]

Digital I/O

 

 

 

 

13

Power

Vdd

Power Pin

 

 

 

 

14

IOHR

P0[7]

Digital I/O

 

 

 

 

15

IOHR

P0[3]

Digital I/O

 

 

 

 

16

IOHR

P0[1]

Digital I/O

 

 

 

 

LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output.

Document Number: 001-12395 Rev *H

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Contents EnCoRe FeaturesEnCoRe V LV Block Diagram Low VoltageFunctional Overview Getting Started EnCoRe V LV CoreAdditional System Resources Development Tools PSoC Designer Software SubsystemsSelect Components Configure ComponentsDesigning with PSoC Designer Organize and ConnectUnits of Measure Document ConventionsAcronyms Used Numeric NamingPin Configuration Pin Part PinoutPin Part Pinout QFN Pin No Type Name Description Vss Ground connectionP16 Digital I/O P02 Digital I/O P30 Digital I/O P32 P20 P22 P24 P26P00 Digital I/O P06 Digital I/OTop View P15 Digital I/O, I2C SDA, SPI Miso No connectionVss Supply ground Vss Supply ground No connectionVdd Supply voltage No connection P01 Digital I/ORegister Mapping Tables Register ReferenceRegister Conventions Register Conventions DescriptionName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessElectrical Specifications Units of Measure Symbol Unit of MeasureADC Electrical Specifications Maximum Ratings DC Electrical CharacteristicsDC Chip Level Specifications Operating ConditionsDC General Purpose I/O Specifications Vdd Port 2 or 3 Pins Current in all I/Os High Output VoltageSink current on odd port pins for Example, P03 and P15 Input Low Voltage VddInput High Voltage Vdd Input Hysteresis Voltage DC POR and LVD Specifications DC Programming SpecificationsAC Electrical Characteristics AC Chip Level SpecificationsAC General Purpose IO Specifications AC External Clock Specifications AC Programming SpecificationsAC SPI Specifications AC SPI Specifications Symbol Description Min Typ Max UnitsWidth of SS Negated Between Transmissions AC I2C Specifications Package Diagram Packaging DimensionsPin 5 x 5 x 0.55 mm QFN Package Handling 125Solder Reflow Peak Temperature Thermal ImpedancesOrdering Information Document History Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions