Cypress CY14B104LA, CY14B104NA manual Software Controlled STORE/RECALL Cycle

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PRELIMINARY

CY14B104LA, CY14B104NA

Software Controlled STORE/RECALL Cycle

In the following table, the software controlled STORE and RECALL cycle parameters are listed.[24, 25]

Parameters

Description

 

20 ns

 

25 ns

 

45 ns

Unit

Min

 

Max

Min

 

Max

Min

 

Max

 

 

 

 

 

 

tRC

STORE/RECALL Initiation Cycle Time

20

 

 

25

 

 

45

 

 

ns

tSA

Address Setup Time

0

 

 

0

 

 

0

 

 

ns

tCW

Clock Pulse Width

15

 

 

20

 

 

30

 

 

ns

tHA

Address Hold Time

0

 

 

0

 

 

0

 

 

ns

tRECALL

RECALL Duration

 

 

200

 

 

200

 

 

200

μs

Switching Waveforms

Figure 12. CE and OE Controlled Software STORE/RECALL Cycle[25]

 

 

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Figure 13. AutoStore Enable/Disable Cycle

 

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Notes

24.The software sequence is clocked with CE controlled or OE controlled reads.

25.The six consecutive addresses must be read in the order listed in Table 1 on page 5. WE must be HIGH during all six consecutive cycles.

Document #: 001-49918 Rev. *A

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Contents Functional Description FeaturesLogic Block Diagram1, 2 Cypress Semiconductor Corporation 198 Champion CourtTsop PinoutsX16 Top View Not to scale Pin Definitions Sram Write Device OperationSram Read AutoStore OperationA15 A07 Mode Power Hardware Recall Power UpMode Selection Software StoreData Protection Mode Selection A15 A07 PowerPreventing AutoStore Noise ConsiderationsBest Practices Operating Range DC Electrical CharacteristicsMaximum Ratings RangeThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsAC Switching Characteristics Switching WaveformsBHE, BLE Data Input Input Data Valid High Impedance Data Output Data Input Data OutputInput Data Valid High Impedance HSB AutoStore/Power Up RecallParameters Description 20 ns 25 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycle Description 20 ns 25 ns 45 ns Unit Min Max To Output Active Time when write latch not setHardware Store Cycle Hardware Store Pulse WidthHSB should remain High for Sram Operations Inputs/Outputs2 Mode PowerTruth Table For Sram Operations Ordering Information CY14B104LA-ZS45XIT CY14B104LA-ZS45XCTCY14B104LA-ZS45XC CY14B104LA-ZS45XIZS Tsop Part Numbering NomenclatureCY 14 B 104 L a -ZS P 20 X C T NvsramPackage Diagrams TOP ViewBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 GVCH/PYRS Sales, Solutions, and Legal InformationDocument History USB