Cypress CY14B104NA, CY14B104LA manual Ball Fbga 6 mm x 10 mm x 1.2 mm

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PRELIMINARY

CY14B104LA, CY14B104NA

Figure 17. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm (51-85128)

TOP VIEW

A1 CORNER

1 2 3 4 5 6

BOTTOM VIEW

A1 CORNER

0.36

6.00±0.10

SEATING PLANE

1.20 MAX

10.00±0.10

Document #: 001-49918 Rev. *A

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Contents Logic Block Diagram1, 2 FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPinouts X16 Top View Not to scaleTsop Pin Definitions Sram Read Device OperationSram Write AutoStore OperationMode Selection Hardware Recall Power UpA15 A07 Mode Power Software StorePreventing AutoStore Mode Selection A15 A07 PowerData Protection Noise ConsiderationsBest Practices Maximum Ratings DC Electrical CharacteristicsOperating Range RangeCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsSwitching Waveforms AC Switching CharacteristicsBHE, BLE Data Input Data Output Input Data Valid High ImpedanceData Input Input Data Valid High Impedance Data Output AutoStore/Power Up Recall Parameters Description 20 ns 25 ns 45 ns Unit Min MaxHSB Software Controlled STORE/RECALL Cycle Hardware Store Cycle To Output Active Time when write latch not setDescription 20 ns 25 ns 45 ns Unit Min Max Hardware Store Pulse WidthInputs/Outputs2 Mode Power Truth Table For Sram OperationsHSB should remain High for Sram Operations Ordering Information CY14B104LA-ZS45XC CY14B104LA-ZS45XCTCY14B104LA-ZS45XIT CY14B104LA-ZS45XICY 14 B 104 L a -ZS P 20 X C T Part Numbering NomenclatureZS Tsop NvsramTOP View Package DiagramsBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Document History Sales, Solutions, and Legal InformationGVCH/PYRS USB