Cypress CY14B104LA Truth Table For Sram Operations, HSB should remain High for Sram Operations

Page 16

PRELIMINARY

CY14B104LA, CY14B104NA

Truth Table For SRAM Operations

HSB should remain HIGH for SRAM Operations.

For x8 Configuration

 

CE

 

 

WE

 

 

OE

 

Inputs/Outputs[2]

Mode

Power

 

H

 

 

X

 

 

X

 

High Z

Deselect/Power down

Standby

 

L

 

 

H

 

 

L

 

Data Out (DQ0–DQ7);

Read

Active

 

L

 

 

H

 

 

H

 

High Z

Output Disabled

Active

 

L

 

 

L

 

 

X

 

Data in (DQ0–DQ7);

Write

Active

For x16 Configuration

 

CE

 

 

WE

 

 

OE

 

 

BHE

[3]

 

BLE

[3]

Inputs/Outputs[2]

Mode

Power

 

H

 

 

X

 

 

X

 

 

X

 

X

High-Z

Deselect/Power down

Standby

 

L

 

 

X

 

 

X

 

 

H

 

H

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

L

 

 

L

 

L

Data Out (DQ0–DQ15)

Read

Active

 

L

 

 

H

 

 

L

 

 

H

 

L

Data Out (DQ0–DQ7);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

H

 

 

L

 

 

L

 

H

Data Out (DQ8–DQ15);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

 

L

 

 

H

 

 

H

 

 

L

 

L

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

H

 

L

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

L

 

H

High-Z

Output Disabled

Active

 

L

 

 

L

 

 

X

 

 

L

 

L

Data In (DQ0–DQ15)

Write

Active

 

L

 

 

L

 

 

X

 

 

H

 

L

Data In (DQ0–DQ7);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

L

 

 

X

 

 

L

 

H

Data In (DQ8–DQ15);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

Document #: 001-49918 Rev. *A

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Contents Features Logic Block Diagram1, 2Functional Description Cypress Semiconductor Corporation 198 Champion CourtX16 Top View Not to scale PinoutsTsop Pin Definitions Device Operation Sram ReadSram Write AutoStore OperationHardware Recall Power Up Mode SelectionA15 A07 Mode Power Software StoreMode Selection A15 A07 Power Preventing AutoStoreData Protection Noise ConsiderationsBest Practices DC Electrical Characteristics Maximum RatingsOperating Range RangeData Retention and Endurance CapacitanceThermal Resistance AC Test ConditionsAC Switching Characteristics Switching WaveformsBHE, BLE Input Data Valid High Impedance Data Input Data OutputData Input Input Data Valid High Impedance Data Output Parameters Description 20 ns 25 ns 45 ns Unit Min Max AutoStore/Power Up RecallHSB Software Controlled STORE/RECALL Cycle To Output Active Time when write latch not set Hardware Store CycleDescription 20 ns 25 ns 45 ns Unit Min Max Hardware Store Pulse WidthTruth Table For Sram Operations Inputs/Outputs2 Mode PowerHSB should remain High for Sram Operations Ordering Information CY14B104LA-ZS45XCT CY14B104LA-ZS45XCCY14B104LA-ZS45XIT CY14B104LA-ZS45XIPart Numbering Nomenclature CY 14 B 104 L a -ZS P 20 X C TZS Tsop NvsramPackage Diagrams TOP ViewBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Sales, Solutions, and Legal Information Document HistoryGVCH/PYRS USB