Memory
Architecture | |
Memory connectors | two; gold contacts |
Memory capacities | 64, 128, and 256 MB |
Minimum memory | 64 MB |
Maximum memory | 512 MB |
Frequency | 133 MHz |
Clock cycle | 7.5 ns (supports 4 clocks only) |
CAS latency | 3 |
SPD revision | 1.2 A |
Buffering | unbuffered |
Voltage | 3.3 V |
Data bus width | 64 bits |
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Drives |
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Externally accessible: |
|
Mini tower chassis | two |
| three |
Desktop chassis | two |
| two |
Internally accessible | two bays for |
Available devices | |
| CD drives, DVD drives, |
| Zip drives |
|
|
Ports and Connectors |
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|
Externally accessible: |
|
Serial | |
Parallel | |
Video |
Appendix
75