National Products manual DS90C3202 Pin Descriptions, Pin No Pin Name Pin Type Description

Page 15

DS90C3202 Pin Descriptions

Pin No.

Pin Name

I/O

Pin Type

Description

 

 

 

 

 

1

S2DAT

I/OP

Digital

Two-wire Serial Interface – Data

 

 

 

 

 

2

S2CLK

I/P

Digital

Two-wire Serial Interface – Clock

 

 

 

 

 

3

VDDP1

VDD

PLL

Power supply for PLL circuitry

 

 

 

 

 

4

VSSP1

GND

PLL

Ground pin for PLL circuitry

 

 

 

 

 

5

VSSP0

GND

PLL

Ground pin for PLL circuitry

 

 

 

 

 

6

VDDP0

VDD

PLL

Power supply for PLL circuitry

 

 

 

 

 

7

PWDNB

I/P

LVTTL I/P (pulldown)

Powerdown Bar (Active LOW)

 

 

 

 

0 = DEVICE DISABLED

 

 

 

 

1 = DEVICE ENABLED

 

 

 

 

 

8

RXEE0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

9

RXEE1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

10

RXEE2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

11

RXEE3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

12

RXEE4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

13

RXEE5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

14

RXEE6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

15

VSS0

GND

LVTTL O/P PWR

Ground pin for LVTTL outputs and digital circuitry

 

 

 

 

 

16

VDD0

VDD

LVTTL O/P PWR

Power supply pin for LVTTL outputs and digital

 

 

 

 

circuitry

 

 

 

 

 

17

RXED0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

18

RXED1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

19

RXED2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

20

RXED3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

21

RXED4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

22

RXED5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

23

RXED6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

24

VSSR0

GND

RX LOGIC

Ground pin for logic

 

 

 

 

 

25

VDDR0

VDD

RX LOGIC

Power supply for logic

 

 

 

 

 

26

RXEC0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

27

RXEC1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

28

RXEC2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

29

RXEC3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

30

RXEC4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

31

RXEC5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

32

VSS1

GND

LVTTL O/P PWR

Ground pin for LVTTL outputs and digital circuitry

 

 

 

 

 

33

VDD1

VDD

LVTTL O/P PWR

Power supply pin for LVTTL outputs and digital

 

 

 

 

circuitry

 

 

 

 

 

34

RXEC6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

35

RXEB0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

36

RXEB1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

37

RXEB2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

38

RXEB3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

39

RXEB4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

40

RXEB5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

41

RXEB6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

42

VSSR1

GND

RX LOGIC

Ground pin for logic

 

 

 

 

 

43

VDDR1

VDD

RX LOGIC

Power supply for logic

 

 

 

 

 

44

RCLKOUT

O/P

LVTTL O/P

LVTTL level clock output

 

 

 

 

 

45

VSS2

GND

LVTTL O/P PWR

Ground pin for LVTTL outputs and digital circuitry

 

 

 

 

 

DS90C3202

15

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Image 15
Contents Features Block DiagramGeneral Description Functional Description Typical Application DiagramRecommended Operating Conditions Electrical CharacteristicsLvds Receiver DC Specifications Absolute Maximum Ratings NoteReceiver Supply Current Symbol Parameter Conditions Min Typ Max UnitsSymbol Parameter Condition Min Typ Max Units Reference Receiver Switching CharacteristicsAC Timing Diagrams Two-Wire Serial Communication InterfaceWorst Case Test Pattern Receiver Phase Lock Loop Wake-up Time Receiver Input Tolerance and Sampling Window RFB Lvttl Level Programmable Strobe SelectRegisterAddress 29d/1dh bit 21 = 00b Receiver Rsrc and Rhrc Output Setup/Hold Time PTO Enabled20147115 Lvds Input Mapping Receiver Ritol Min and Max DS90C3202 Receiver Pin DiagramPin No Pin Name Pin Type Description DS90C3202 Pin DescriptionsDS90C3202 Pin Descriptions RXOA4 Lvttl O/P Communicating with the DS90C3202 Control Registers Two-Wire Serial Communication Interface DescriptionAddress DS90C3202 Two-Wire Serial Interface Register TableReset Bit # Description Default ValueBit # Description DS90C3202 Two-Wire Serial Interface Register Table DS90C3202 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver