National Products manual DS90C3202 Pin Descriptions

Page 16

DS90C3202

DS90C3202 Pin Descriptions

(Continued)

 

 

 

 

 

 

Pin No.

Pin Name

I/O

Pin Type

Description

 

 

 

 

 

46

VDD2

VDD

LVTTL O/P PWR

Power supply pin for LVTTL outputs and digital

 

 

 

 

circuitry

 

 

 

 

 

47

RXEA0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

48

RXEA1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

49

RXEA2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

50

RXEA3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

51

RXEA4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

52

RXEA5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

53

RXEA6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

54

VSS3

GND

LVTTL O/P PWR

Ground pin for LVTTL outputs and digital circuitry

 

 

 

 

 

55

VDD3

VDD

LVTTL O/P PWR

Power supply pin for LVTTL outputs and digital

 

 

 

 

circuitry

 

 

 

 

 

56

RXOE0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

57

RXOE1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

58

RXOE2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

59

RXOE3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

60

RXOE4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

61

RXOE5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

62

RXOE6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

63

RXOD0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

64

VSS4

GND

LVTTL O/P PWR

Ground pin for LVTTL outputs and digital circuitry

 

 

 

 

 

65

VDD4

VDD

LVTTL O/P PWR

Power supply pin for LVTTL outputs and digital

 

 

 

 

circuitry

 

 

 

 

 

66

RXOD1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

67

RXOD2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

68

RXOD3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

69

RXOD4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

70

RXOD5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

71

RXOD6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

72

RXOC0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

73

RXOC1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

74

RXOC2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

75

RXOC3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

76

RXOC4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

77

RXOC5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

78

RXOC6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

79

RXOB0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

80

RXOB1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

81

RXOB2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

82

RXOB3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

83

RXOB4

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

84

RXOB5

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

85

RXOB6

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

86

VDDR2

VDD

RX LOGIC

Power supply for logic

 

 

 

 

 

87

VSSR2

GND

RX LOGIC

Ground pin for logic

 

 

 

 

 

88

RXOA0

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

89

RXOA1

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

90

RXOA2

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

91

RXOA3

O/P

LVTTL O/P

LVTTL level data output

 

 

 

 

 

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Contents Block Diagram FeaturesGeneral Description Typical Application Diagram Functional DescriptionElectrical Characteristics Lvds Receiver DC SpecificationsAbsolute Maximum Ratings Note Recommended Operating ConditionsSymbol Parameter Conditions Min Typ Max Units Receiver Supply CurrentReceiver Switching Characteristics Symbol Parameter Condition Min Typ Max Units ReferenceTwo-Wire Serial Communication Interface AC Timing DiagramsWorst Case Test Pattern Receiver Phase Lock Loop Wake-up Time RFB Lvttl Level Programmable Strobe Select Receiver Input Tolerance and Sampling WindowReceiver Rsrc and Rhrc Output Setup/Hold Time PTO Enabled RegisterAddress 29d/1dh bit 21 = 00b20147115 Lvds Input Mapping Receiver Ritol Min and Max Pin Diagram DS90C3202 ReceiverDS90C3202 Pin Descriptions Pin No Pin Name Pin Type DescriptionDS90C3202 Pin Descriptions RXOA4 Lvttl O/P Two-Wire Serial Communication Interface Description Communicating with the DS90C3202 Control RegistersDS90C3202 Two-Wire Serial Interface Register Table ResetBit # Description Default Value AddressBit # Description DS90C3202 Two-Wire Serial Interface Register Table DS90C3202 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver