Synopsys 640-pin Generic Device Adapter manual Routing Guidelines, J1-D17 Keepalive

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Chapter 2: Building the Daughterboard

The ModelSource 640-pin Adapter

The DUT signal traces (DUT1 through DUT640) are controlled impedance, and must be 93 ohms ± 10%. (All other signals are uncontrolled but will function correctly at 93 ohms.)

You must make the following specific connections:

J1-A1 to J1-F48 (SEAT1)

J2-A1 to J2-F24 (SEAT2)

J3-A1 to J3-F48 (SEAT3)

J4-A1 to J4-F24 (SEAT4)

J5-A1 to J5-F24 (SEAT5)

J6-A1 to J6-F24 (SEAT6)

(These connections pass a daisychain signal through all four J connectors to allow the ModelSource system to detect whether or not the Adapter is seated correctly.)

You must provide a series termination of 4.7 ohms within 1 inch of the DUT’s signal pins. Use as small a surface mount package as can practically be mounted.

Routing Guidelines

Provide connections for your DUT device(s) on the Daughterboard. Route the DUT signals (DUT1 through DUT640) and other appropriate signals to the J connector pins according to the pinout listing in “J1–J6 Connector Pinouts” on page 29.

The following are some guidelines:

For optimal pattern clock rates, ensure that all DUT signals are the same length, or nearly so (within 0.5 inch).

Use either microstrip (preferred) or stripline for the signal layers, but do not mix them, because their propagation velocities are different. Use microstrip if the signal routing fits on two layers; use stripline if the signal routing requires more than two layers.

For ease of testing, create test points for the following signals:

J1-D17 (KEEPALIVE)

J1-A15 (TRIGGER)

J1-A19 (PLAY)

J1-A17 (SAMPLE)

Any voltages used by the DUT

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Synopsys, Inc.

November 2001

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Contents Using the ModelSource Pin Generic Device Adapter ModelSource 640-pin Adapter Contents Appendix a J1-J6 Connector Pinouts Preface About This Application NoteTypographical and Symbol Conventions Getting Help Pin1 pin2 ... pinNComments? Doc@synopsys.comDescribing a 640-pin Logic Model Hardware RequirementsSoftware Requirements Procedural SummaryBuilding the Daughterboard Daughterboard Description640-pin Adapter Daughterboard Connector Pin Detail Connectors J1 and J3Parts List Connector Pin Detail, Shown from Component SideRequirements Shows a drawing of the short and long board stiffenersRouting Guidelines J1-D17 KeepaliveP5V ADJVCC1ADJVCC2 M5VPage Connecting the Daughterboard Adapter Description640-pin Generic Device Adapter Procedures Page User-Generated Files Developing the Shell SoftwareFiles Provided by Synopsys Partial GEN640.PKG File Completing the Model Mounting the Adapter onto the ModelSource Modeling SystemsLabeling the Daughterboard Verifying the ModelUnmounting the Adapter from the ModelSource Modeling Systems Page SEAT1 J1-J6 Connector PinoutsTrigger Sample PlayTemp Pinouts for Connectors J1-J6 DUT11 DUT13DUT10 DUT9DUT38 DUT37DUT36 DUT42DUT55 DUT54DUT53 DUT12DUT41 DUT35DUT43 DUT44DUT80 SEAT2Pinouts for Connectors J1-J6 DUT91 DUT93DUT90 DUT89DUT92 DUT94DUT95 DUT96FP6 FP7FP8 SEAT3DUT640 Reserved AD13 Reserved AD7Reserved AD5 Reserved AD0DUT615 Reserved AD11 Reserved AD12Reserved AD6 Reserved AD2Reserved AD10 Reserved AD9 Reserved AD3Reserved AD4 Reserved -RDReserved AD8 Reserved AD14Reserved AD1 Reserved -AS Reserved AD15SEAT4 DUT553 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 SEAT4 DUT400 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 SEAT5 FP1 Reserved FP2 FP3 FP4 FP5 FP6 FP7 FP8 SEAT6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 F20 DUT285 F21 DUT286 F22 F23 F24 FP5 Reserved FP6 FP7 FP8