Synopsys 640-pin Generic Device Adapter manual P5V, ADJVCC1, ADJVCC2, M5V, FANP12V

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The ModelSource 640-pin Adapter

Chapter 2: Building the Daughterboard

J4-FP5–J4-FP8 (FANP12V), if used

DUT signal used for DUT clock

You can connect to any of the available power supplies listed in Table 1. Do not interconnect different power supplies.

Table 1: Available Power Supplies

Pins

Signal

Power Supply

 

 

 

 

 

 

J2-AP5–J2-AP8

P5V

+5V DC, 6A max

J4-AP5–J4-AP8

 

 

 

 

 

J2-AP1–J2-AP4

ADJVCC1

+3-5V DC, 6A max

 

 

 

J4-AP1–J4-AP4

ADJVCC2

+3-5V DC, 6A max

 

 

 

J4-FP1–J4-FP4

M5V

-5.2V DC, 400mA max

 

 

 

J2-FP5–J2-FP8

P12V

+12V DC, 400mA max

 

 

 

J4-FP5–J4-FP8

FANP12V

+12V DC, 400mA max (for

 

 

fan/heat sink only)

 

 

 

For bypass/decoupling capacitors, follow the DUT manufacturer’s recommendations, if provided; otherwise, use the following guidelines:

For each supply of P5V, ADJVCC1 or ADJVCC2, provide 47F, 16V tantalum (use two of these, if space permits).

For each supply of P12V, M5V, provide 10F, 16V tantalum.

For bypass, for every 25 signal pins, place a pair of 0.1F and 0.01F high frequency X7R or NPO capacitors directly underneath the device, if possible, or around the perimeter of the device.

November 2001

Synopsys, Inc.

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Contents Using the ModelSource Pin Generic Device Adapter ModelSource 640-pin Adapter Contents Appendix a J1-J6 Connector Pinouts About This Application Note PrefaceTypographical and Symbol Conventions Pin1 pin2 ... pinN Getting HelpDoc@synopsys.com Comments?Hardware Requirements Describing a 640-pin Logic ModelProcedural Summary Software RequirementsDaughterboard Description Building the Daughterboard640-pin Adapter Daughterboard Connectors J1 and J3 Connector Pin Detail Connector Pin Detail, Shown from Component Side Parts ListShows a drawing of the short and long board stiffeners RequirementsJ1-D17 Keepalive Routing GuidelinesADJVCC1 P5VADJVCC2 M5VPage Adapter Description Connecting the Daughterboard640-pin Generic Device Adapter Procedures Page Files Provided by Synopsys Developing the Shell SoftwareUser-Generated Files Partial GEN640.PKG File Mounting the Adapter onto the ModelSource Modeling Systems Completing the ModelVerifying the Model Labeling the DaughterboardUnmounting the Adapter from the ModelSource Modeling Systems Page Trigger J1-J6 Connector PinoutsSEAT1 Play SampleTemp Pinouts for Connectors J1-J6 DUT13 DUT11DUT10 DUT9DUT37 DUT38DUT36 DUT42DUT54 DUT55DUT53 DUT12DUT35 DUT41DUT43 DUT44SEAT2 DUT80Pinouts for Connectors J1-J6 DUT93 DUT91DUT90 DUT89DUT94 DUT92DUT95 DUT96FP7 FP6FP8 SEAT3DUT640 Reserved AD7 Reserved AD13Reserved AD5 Reserved AD0DUT615 Reserved AD12 Reserved AD11Reserved AD6 Reserved AD2Reserved AD10 Reserved AD3 Reserved AD9Reserved AD4 Reserved -RDReserved AD1 Reserved AD14Reserved AD8 SEAT4 Reserved AD15Reserved -AS DUT553 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 SEAT4 DUT400 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 SEAT5 FP1 Reserved FP2 FP3 FP4 FP5 FP6 FP7 FP8 SEAT6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 Pinouts for Connectors J1-J6 F20 DUT285 F21 DUT286 F22 F23 F24 FP5 Reserved FP6 FP7 FP8