Xilinx 3.2 manual LogiCORE IP can, UG186 April 19

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LogiCORE™ IP CAN v3.2

Getting Started Guide

UG186 April 19, 2010

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Contents UG186 April 19 LogiCORE IP canVersion Revision Revision HistoryTable of Contents Detailed Example Design 1Example Design Schedule of FiguresCan Getting Started Guide About This Guide Guide ContentsConventions Preface About This Guide Convention Meaning or Use Example Online DocumentAbout the Core System Requirements IntroductionWindows LinuxAdditional Core Resources Recommended Design ExperienceTechnical Support FeedbackBefore you Begin Licensing the CoreLicense Options Simulation OnlyObtaining Your License Key Installing Your License FileOverview Quick Start Example DesignQuick Start Example Design Generating the CoreImplementing the Example Design Setting up for SimulationSimulating the Example Design Implementing the Example DesignTiming Simulation Functional SimulationDetailed Example Design Directory and File Contents Componentnameexample design Directory and File ContentsComponentname/doc Name DescriptionComponentname/implement/results Componentname/implementComponentname/simulation 5Implement Directory Name DescriptionComponentname/simulation/functional Simulation/timing Simulation Scripts Implementation ScriptsImplementation Scripts 1illustrates the example design configuration Example Design ConfigurationTest Bench Functionality Demonstration Test BenchDemonstration Test Bench Core with Acceptance Filtering Changing the Data Customizing the Demonstration Test BenchDetailed Example Design